[PATCH] Avoid generating SHLD/SHRD for architectures that are known to have poor latency for these instructions.

[Katya Romanova]

  Made the corrections based on Eric's comments.

http://llvm-reviews.chandlerc.com/D2177

CHANGE SINCE LAST DIFF
  http://llvm-reviews.chandlerc.com/D2177?vs=5537&id=5620#toc

Files:
  test/CodeGen/X86/x86-64-double-shifts-var.ll
  test/CodeGen/X86/x86-64-double-precision-shift-left.ll
  test/CodeGen/X86/x86-64-double-precision-shift-right.ll
  test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86.td
  lib/Target/X86/X86Subtarget.cpp
  lib/Target/X86/X86Subtarget.h
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