[llvm] r194676 - Minor extension to llvm.experimental.patchpoint: don't require a call.

Eric Christopher echristo at gmail.com
Thu Nov 14 23:35:38 PST 2013


On Thu, Nov 14, 2013 at 10:09 PM, Andrew Trick <atrick at apple.com> wrote:
> Public bots? I can’t find any.
>

http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/37

as an example.

-eric

> Private bots? In what way are they breaking?
>
> -Andy
>
> On Nov 14, 2013, at 9:59 PM, Eric Christopher <echristo at gmail.com> wrote:
>
>> Hi Andy,
>>
>> This appears to be breaking a lot of bots...
>>
>> -eric
>>
>> On Wed, Nov 13, 2013 at 10:54 PM, Andrew Trick <atrick at apple.com> wrote:
>>> Author: atrick
>>> Date: Thu Nov 14 00:54:10 2013
>>> New Revision: 194676
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=194676&view=rev
>>> Log:
>>> Minor extension to llvm.experimental.patchpoint: don't require a call.
>>>
>>> If a null call target is provided, don't emit a dummy call. This
>>> allows the runtime to reserve as little nop space as it needs without
>>> the requirement of emitting a call.
>>>
>>> Modified:
>>>    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>>>    llvm/trunk/lib/Target/X86/X86MCInstLower.cpp
>>>    llvm/trunk/test/CodeGen/X86/patchpoint.ll
>>>
>>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=194676&r1=194675&r2=194676&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Nov 14 00:54:10 2013
>>> @@ -6826,7 +6826,7 @@ void SelectionDAGBuilder::visitStackmap(
>>> /// \brief Lower llvm.experimental.patchpoint directly to its target opcode.
>>> void SelectionDAGBuilder::visitPatchpoint(const CallInst &CI) {
>>>   // void|i64 @llvm.experimental.patchpoint.void|i64(i32 <id>,
>>> -  //                                                 i32 <numNopBytes>,
>>> +  //                                                 i32 <numBytes>,
>>>   //                                                 i8* <target>,
>>>   //                                                 i32 <numArgs>,
>>>   //                                                 [Args...],
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86MCInstLower.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCInstLower.cpp?rev=194676&r1=194675&r2=194676&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/X86MCInstLower.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/X86MCInstLower.cpp Thu Nov 14 00:54:10 2013
>>> @@ -765,6 +765,8 @@ static void LowerSTACKMAP(MCStreamer &Ou
>>>     OutStreamer.EmitInstruction(MCInstBuilder(X86::NOOP));
>>> }
>>>
>>> +// Lower a patchpoint of the form:
>>> +// [<def>], <id>, <numBytes>, <target>, <numArgs>
>>> static void LowerPATCHPOINT(MCStreamer &OutStreamer,
>>>                             X86MCInstLower &MCInstLowering,
>>>                             StackMaps &SM,
>>> @@ -813,17 +815,20 @@ static void LowerPATCHPOINT(MCStreamer &
>>>                     getStackMapEndMOP(MI.operands_begin(), MI.operands_end()),
>>>                     isAnyRegCC && hasDef);
>>>
>>> -  // Emit MOV to materialize the target address and the CALL to target.
>>> -  // This is encoded with 12-13 bytes, depending on which register is used.
>>> -  // We conservatively assume that it is 12 bytes and emit in worst case one
>>> -  // extra NOP byte.
>>> -  unsigned EncodedBytes = 12;
>>> -  OutStreamer.EmitInstruction(MCInstBuilder(X86::MOV64ri)
>>> -                              .addReg(MI.getOperand(ScratchIdx).getReg())
>>> -                              .addImm(MI.getOperand(StartIdx + 2).getImm()));
>>> -  OutStreamer.EmitInstruction(MCInstBuilder(X86::CALL64r)
>>> -                              .addReg(MI.getOperand(ScratchIdx).getReg()));
>>> -
>>> +  unsigned EncodedBytes = 0;
>>> +  int64_t CallTarget = MI.getOperand(StartIdx + 2).getImm();
>>> +  if (CallTarget) {
>>> +    // Emit MOV to materialize the target address and the CALL to target.
>>> +    // This is encoded with 12-13 bytes, depending on which register is used.
>>> +    // We conservatively assume that it is 12 bytes and emit in worst case one
>>> +    // extra NOP byte.
>>> +    EncodedBytes = 12;
>>> +    OutStreamer.EmitInstruction(MCInstBuilder(X86::MOV64ri)
>>> +                                .addReg(MI.getOperand(ScratchIdx).getReg())
>>> +                                .addImm(CallTarget));
>>> +    OutStreamer.EmitInstruction(MCInstBuilder(X86::CALL64r)
>>> +                                .addReg(MI.getOperand(ScratchIdx).getReg()));
>>> +  }
>>>   // Emit padding.
>>>   unsigned NumNOPBytes = MI.getOperand(StartIdx + 1).getImm();
>>>   assert(NumNOPBytes >= EncodedBytes &&
>>>
>>> Modified: llvm/trunk/test/CodeGen/X86/patchpoint.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/patchpoint.ll?rev=194676&r1=194675&r2=194676&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/X86/patchpoint.ll (original)
>>> +++ llvm/trunk/test/CodeGen/X86/patchpoint.ll Thu Nov 14 00:54:10 2013
>>> @@ -79,6 +79,22 @@ entry:
>>>   ret i64 10
>>> }
>>>
>>> +; Test small patchpoints that don't emit calls.
>>> +define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
>>> +entry:
>>> +; CHECK-LABEL: small_patchpoint_codegen:
>>> +; CHECK:      Ltmp
>>> +; CHECK:      nop
>>> +; CHECK-NEXT: nop
>>> +; CHECK-NEXT: nop
>>> +; CHECK-NEXT: nop
>>> +; CHECK-NEXT: nop
>>> +; CHECK-NEXT: popq
>>> +; CHECK-NEXT: ret
>>> +  %result = tail call i64 (i32, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i32 5, i32 5, i8* null, i32 2, i64 %p1, i64 %p2)
>>> +  ret void
>>> +}
>>> +
>>> declare void @llvm.experimental.stackmap(i32, i32, ...)
>>> declare void @llvm.experimental.patchpoint.void(i32, i32, i8*, i32, ...)
>>> declare i64 @llvm.experimental.patchpoint.i64(i32, i32, i8*, i32, ...)
>>>
>>>
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>




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