[llvm] r194555 - Allow the code which returns the length for inline assembler to know
Reed Kotler
rkotler at mips.com
Tue Nov 12 20:37:52 PST 2013
Author: rkotler
Date: Tue Nov 12 22:37:52 2013
New Revision: 194555
URL: http://llvm.org/viewvc/llvm-project?rev=194555&view=rev
Log:
Allow the code which returns the length for inline assembler to know
specifically about the .space directive. This allows us to force large
blocks of code to appear in test cases for things like constant islands
without having to make giant test cases to force things like long
branches to take effect.
Added:
llvm/trunk/test/CodeGen/Mips/const6a.ll
Modified:
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
llvm/trunk/lib/Target/Mips/MipsConstantIslandPass.cpp
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=194555&r1=194554&r2=194555&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Tue Nov 12 22:37:52 2013
@@ -10,7 +10,8 @@
// This file contains the Mips16 implementation of the TargetInstrInfo class.
//
//===----------------------------------------------------------------------===//
-
+#include <ctype.h>
+#include <stdlib.h>
#include "Mips16InstrInfo.h"
#include "InstPrinter/MipsInstPrinter.h"
#include "MipsMachineFunction.h"
@@ -20,6 +21,7 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
+#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
@@ -495,3 +497,47 @@ bool Mips16InstrInfo::validImmediate(uns
}
llvm_unreachable("unexpected Opcode in validImmediate");
}
+
+/// Measure the specified inline asm to determine an approximation of its
+/// length.
+/// Comments (which run till the next SeparatorString or newline) do not
+/// count as an instruction.
+/// Any other non-whitespace text is considered an instruction, with
+/// multiple instructions separated by SeparatorString or newlines.
+/// Variable-length instructions are not handled here; this function
+/// may be overloaded in the target code to do that.
+/// We implement the special case of the .space directive taking only an
+/// integer argument, which is the size in bytes. This is used for creating
+/// inline code spacing for testing purposes using inline assembly.
+///
+unsigned Mips16InstrInfo::getInlineAsmLength(const char *Str,
+ const MCAsmInfo &MAI) const {
+
+
+ // Count the number of instructions in the asm.
+ bool atInsnStart = true;
+ unsigned Length = 0;
+ for (; *Str; ++Str) {
+ if (*Str == '\n' || strncmp(Str, MAI.getSeparatorString(),
+ strlen(MAI.getSeparatorString())) == 0)
+ atInsnStart = true;
+ if (atInsnStart && !std::isspace(static_cast<unsigned char>(*Str))) {
+ if (strncmp(Str, ".space", 6)==0) {
+ char *EStr; int Sz;
+ Sz = strtol(Str+6, &EStr, 10);
+ while (isspace(*EStr)) ++EStr;
+ if (*EStr=='\0') {
+ DEBUG(dbgs() << "parsed .space " << Sz << '\n');
+ return Sz;
+ }
+ }
+ Length += MAI.getMaxInstLength();
+ atInsnStart = false;
+ }
+ if (atInsnStart && strncmp(Str, MAI.getCommentString(),
+ strlen(MAI.getCommentString())) == 0)
+ atInsnStart = false;
+ }
+
+ return Length;
+}
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h?rev=194555&r1=194554&r2=194555&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.h Tue Nov 12 22:37:52 2013
@@ -108,6 +108,8 @@ public:
void BuildAddiuSpImm
(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const;
+ unsigned getInlineAsmLength(const char *Str,
+ const MCAsmInfo &MAI) const;
private:
virtual unsigned getAnalyzableBrOpc(unsigned Opc) const;
Modified: llvm/trunk/lib/Target/Mips/MipsConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsConstantIslandPass.cpp?rev=194555&r1=194554&r2=194555&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsConstantIslandPass.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsConstantIslandPass.cpp Tue Nov 12 22:37:52 2013
@@ -25,6 +25,7 @@
#include "Mips.h"
#include "MCTargetDesc/MipsBaseInfo.h"
+#include "Mips16InstrInfo.h"
#include "MipsMachineFunction.h"
#include "MipsTargetMachine.h"
#include "llvm/ADT/Statistic.h"
@@ -237,7 +238,7 @@ namespace {
bool IsPIC;
unsigned ABI;
const MipsSubtarget *STI;
- const MipsInstrInfo *TII;
+ const Mips16InstrInfo *TII;
MipsFunctionInfo *MFI;
MachineFunction *MF;
MachineConstantPool *MCP;
@@ -359,7 +360,7 @@ bool MipsConstantIslands::runOnMachineFu
!MipsSubtarget::useConstantIslands()) {
return false;
}
- TII = (const MipsInstrInfo*)MF->getTarget().getInstrInfo();
+ TII = (const Mips16InstrInfo*)MF->getTarget().getInstrInfo();
MFI = MF->getInfo<MipsFunctionInfo>();
DEBUG(dbgs() << "constant island processing " << "\n");
//
Added: llvm/trunk/test/CodeGen/Mips/const6a.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/const6a.ll?rev=194555&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/const6a.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/const6a.ll Tue Nov 12 22:37:52 2013
@@ -0,0 +1,29 @@
+; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=load-relax1
+
+; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=load-relax
+
+; ModuleID = 'const6a.c'
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32-S64"
+target triple = "mips--linux-gnu"
+
+ at i = common global i32 0, align 4
+
+; Function Attrs: nounwind
+define void @t() #0 {
+entry:
+ store i32 -559023410, i32* @i, align 4
+; load-relax-NOT: lw ${{[0-9]+}}, $CPI0_0 # 16 bit inst
+; load-relax1: lw ${{[0-9]+}}, $CPI0_0
+; load-relax: jrc $ra
+; load-relax: .align 2
+; load-relax: $CPI0_0:
+; load-relax: .4byte 3735943886
+; load-relax: .end t
+ call void asm sideeffect ".space 40000", ""() #1, !srcloc !1
+ ret void
+}
+
+attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
+attributes #1 = { nounwind }
+
+!1 = metadata !{i32 121}
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