[llvm] r194387 - [mips][msa] CHECK-DAG-ize MSA 2rf.ll test.
Matheus Almeida
matheus.almeida at imgtec.com
Mon Nov 11 08:24:53 PST 2013
Author: matheusalmeida
Date: Mon Nov 11 10:24:53 2013
New Revision: 194387
URL: http://llvm.org/viewvc/llvm-project?rev=194387&view=rev
Log:
[mips][msa] CHECK-DAG-ize MSA 2rf.ll test.
No functional changes.
Modified:
llvm/trunk/test/CodeGen/Mips/msa/2rf.ll
Modified: llvm/trunk/test/CodeGen/Mips/msa/2rf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/msa/2rf.ll?rev=194387&r1=194386&r2=194387&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/msa/2rf.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/msa/2rf.ll Mon Nov 11 10:24:53 2013
@@ -16,9 +16,11 @@ entry:
declare <4 x float> @llvm.mips.flog2.w(<4 x float>) nounwind
; CHECK: llvm_mips_flog2_w_test:
-; CHECK: ld.w
-; CHECK: flog2.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_flog2_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: flog2.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_flog2_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_flog2_w_test
;
@llvm_mips_flog2_d_ARG1 = global <2 x double> <double 0.000000e+00, double 1.000000e+00>, align 16
@@ -35,9 +37,11 @@ entry:
declare <2 x double> @llvm.mips.flog2.d(<2 x double>) nounwind
; CHECK: llvm_mips_flog2_d_test:
-; CHECK: ld.d
-; CHECK: flog2.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_flog2_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: flog2.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_flog2_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_flog2_d_test
define void @flog2_w_test() nounwind {
@@ -51,9 +55,11 @@ entry:
declare <4 x float> @llvm.log2.v4f32(<4 x float> %val)
; CHECK: flog2_w_test:
-; CHECK: ld.w
-; CHECK: flog2.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_flog2_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: flog2.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_flog2_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size flog2_w_test
define void @flog2_d_test() nounwind {
@@ -67,9 +73,11 @@ entry:
declare <2 x double> @llvm.log2.v2f64(<2 x double> %val)
; CHECK: flog2_d_test:
-; CHECK: ld.d
-; CHECK: flog2.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_flog2_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: flog2.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_flog2_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size flog2_d_test
;
@llvm_mips_frint_w_ARG1 = global <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, align 16
@@ -86,9 +94,11 @@ entry:
declare <4 x float> @llvm.mips.frint.w(<4 x float>) nounwind
; CHECK: llvm_mips_frint_w_test:
-; CHECK: ld.w
-; CHECK: frint.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frint_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frint.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frint_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_frint_w_test
;
@llvm_mips_frint_d_ARG1 = global <2 x double> <double 0.000000e+00, double 1.000000e+00>, align 16
@@ -105,9 +115,11 @@ entry:
declare <2 x double> @llvm.mips.frint.d(<2 x double>) nounwind
; CHECK: llvm_mips_frint_d_test:
-; CHECK: ld.d
-; CHECK: frint.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frint_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frint.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frint_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_frint_d_test
define void @frint_w_test() nounwind {
@@ -121,9 +133,11 @@ entry:
declare <4 x float> @llvm.rint.v4f32(<4 x float>) nounwind
; CHECK: frint_w_test:
-; CHECK: ld.w
-; CHECK: frint.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frint_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frint.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frint_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size frint_w_test
define void @frint_d_test() nounwind {
@@ -137,9 +151,11 @@ entry:
declare <2 x double> @llvm.rint.v2f64(<2 x double>) nounwind
; CHECK: frint_d_test:
-; CHECK: ld.d
-; CHECK: frint.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frint_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frint.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frint_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size frint_d_test
;
@llvm_mips_frcp_w_ARG1 = global <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, align 16
@@ -156,9 +172,11 @@ entry:
declare <4 x float> @llvm.mips.frcp.w(<4 x float>) nounwind
; CHECK: llvm_mips_frcp_w_test:
-; CHECK: ld.w
-; CHECK: frcp.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frcp_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frcp.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frcp_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_frcp_w_test
;
@llvm_mips_frcp_d_ARG1 = global <2 x double> <double 0.000000e+00, double 1.000000e+00>, align 16
@@ -175,9 +193,11 @@ entry:
declare <2 x double> @llvm.mips.frcp.d(<2 x double>) nounwind
; CHECK: llvm_mips_frcp_d_test:
-; CHECK: ld.d
-; CHECK: frcp.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frcp_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frcp.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frcp_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_frcp_d_test
;
@llvm_mips_frsqrt_w_ARG1 = global <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, align 16
@@ -194,9 +214,11 @@ entry:
declare <4 x float> @llvm.mips.frsqrt.w(<4 x float>) nounwind
; CHECK: llvm_mips_frsqrt_w_test:
-; CHECK: ld.w
-; CHECK: frsqrt.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frsqrt_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frsqrt.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frsqrt_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_frsqrt_w_test
;
@llvm_mips_frsqrt_d_ARG1 = global <2 x double> <double 0.000000e+00, double 1.000000e+00>, align 16
@@ -213,9 +235,11 @@ entry:
declare <2 x double> @llvm.mips.frsqrt.d(<2 x double>) nounwind
; CHECK: llvm_mips_frsqrt_d_test:
-; CHECK: ld.d
-; CHECK: frsqrt.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_frsqrt_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: frsqrt.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_frsqrt_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_frsqrt_d_test
;
@llvm_mips_fsqrt_w_ARG1 = global <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, align 16
@@ -232,9 +256,11 @@ entry:
declare <4 x float> @llvm.mips.fsqrt.w(<4 x float>) nounwind
; CHECK: llvm_mips_fsqrt_w_test:
-; CHECK: ld.w
-; CHECK: fsqrt.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_fsqrt_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: fsqrt.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_fsqrt_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_fsqrt_w_test
;
@llvm_mips_fsqrt_d_ARG1 = global <2 x double> <double 0.000000e+00, double 1.000000e+00>, align 16
@@ -251,9 +277,11 @@ entry:
declare <2 x double> @llvm.mips.fsqrt.d(<2 x double>) nounwind
; CHECK: llvm_mips_fsqrt_d_test:
-; CHECK: ld.d
-; CHECK: fsqrt.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_fsqrt_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: fsqrt.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_fsqrt_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size llvm_mips_fsqrt_d_test
define void @fsqrt_w_test() nounwind {
@@ -267,9 +295,11 @@ entry:
declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) nounwind
; CHECK: fsqrt_w_test:
-; CHECK: ld.w
-; CHECK: fsqrt.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_fsqrt_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: fsqrt.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_fsqrt_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
; CHECK: .size fsqrt_w_test
define void @fsqrt_d_test() nounwind {
@@ -283,8 +313,10 @@ entry:
declare <2 x double> @llvm.sqrt.v2f64(<2 x double>) nounwind
; CHECK: fsqrt_d_test:
-; CHECK: ld.d
-; CHECK: fsqrt.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_fsqrt_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: fsqrt.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_fsqrt_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
; CHECK: .size fsqrt_d_test
;
More information about the llvm-commits
mailing list