[PATCH] ARMAsmParser permitted p10 and p11 as operands for coprocessor instructions, resulting in ambiguous encodings

[Artyom Skrobov]

Thank you Renato! Committed as r194253.

 

While there, do you want to also take a look at the other coprocessor
acceptance patch that we proposed?
(http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20131104/194058
.html)

 

 

From: Renato Golin [mailto:renato.golin at linaro.org] 
Sent: 08 November 2013 08:00
To: Artyom Skrobov
Cc: LLVM Commits
Subject: Re: [PATCH] ARMAsmParser permitted p10 and p11 as operands for
coprocessor instructions, resulting in ambiguous encodings

 

On 7 November 2013 10:25, Artyom Skrobov <Artyom.Skrobov at arm.com> wrote:

CP10/11 are reserved for FP/NEON operations, and are invalid as operands for
the generic coprocessor instructions.

 

It's funny that the ARM ARM states that p0-p15 are accepted, but on the
pseudo-code it states that Coproc_Accepted() cannot be called for p10/p11
(will assert). There should be a warning on the instructions that use
them...

 

The change looks good to me, though I'd change the word "copro" in the
comment to (at least) "coproc".

 

cheers,

-renato
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