[PATCH] R600: Implement TargetInstrInfo::isLegalToSplitMBBAt()
Tom Stellard
tom at stellard.net
Wed Oct 30 15:40:30 PDT 2013
Here is an updated patch that actually compiles.
-Tom
On Wed, Oct 30, 2013 at 03:15:26PM -0700, Tom Stellard wrote:
> From: Tom Stellard <thomas.stellard at amd.com>
>
> Splitting a basic block will create a new ALU clause, so we need to make
> sure we aren't moving uses of registers that are local to their
> current clause into a new one.
>
> I had a test case for this, but unfortunately unrelated schedule changes
> invalidated it, and I wasn't been able to come up with another one.
> ---
> lib/Target/R600/R600InstrInfo.cpp | 12 ++++++++++++
> lib/Target/R600/R600InstrInfo.h | 2 ++
> 2 files changed, 14 insertions(+)
>
> diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp
> index 3987b2d..ce5c05c 100644
> --- a/lib/Target/R600/R600InstrInfo.cpp
> +++ b/lib/Target/R600/R600InstrInfo.cpp
> @@ -77,6 +77,18 @@ R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
> }
> }
>
> +/// \returns true if \p MBBI can be moved into a new basic.
> +bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
> + MachineBasicBlock::iterator MBBI) const {
> + for (MachineInstr::const_mop_iterator I = MII->operands_begin(),
> + E = MII->operands_end(); I != E; ++I) {
> + if (I->isReg() && !TargetInstrInfo::getVirtualRegister(I->getReg()) &&
> + && I->isUse() && RI.isPhysRegLiveAcrossClauses(I->getReg()))
> + return false;
> + }
> + return true;
> +}
> +
> unsigned R600InstrInfo::getIEQOpcode() const {
> return AMDGPU::SETE_INT;
> }
> diff --git a/lib/Target/R600/R600InstrInfo.h b/lib/Target/R600/R600InstrInfo.h
> index b29b91f..13d9810 100644
> --- a/lib/Target/R600/R600InstrInfo.h
> +++ b/lib/Target/R600/R600InstrInfo.h
> @@ -55,6 +55,8 @@ namespace llvm {
> MachineBasicBlock::iterator MI, DebugLoc DL,
> unsigned DestReg, unsigned SrcReg,
> bool KillSrc) const;
> + bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
> + MachineBasicBlock::iterator MBBI) const;
>
> bool isTrig(const MachineInstr &MI) const;
> bool isPlaceHolderOpcode(unsigned opcode) const;
> --
> 1.8.1.4
>
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> llvm-commits at cs.uiuc.edu
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-------------- next part --------------
>From 876f93de1f285ba51208c3491da1695e23157433 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard at amd.com>
Date: Fri, 18 Oct 2013 18:45:21 -0700
Subject: [PATCH] R600: Implement TargetInstrInfo::isLegalToSplitMBBAt()
Splitting a basic block will create a new ALU clause, so we need to make
sure we aren't moving uses of registers that are local to their
current clause into a new one.
I had a test case for this, but unfortunately unrelated schedule changes
invalidated it, and I wasn't been able to come up with another one.
---
lib/Target/R600/R600InstrInfo.cpp | 12 ++++++++++++
lib/Target/R600/R600InstrInfo.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp
index 3987b2d..1b5a462 100644
--- a/lib/Target/R600/R600InstrInfo.cpp
+++ b/lib/Target/R600/R600InstrInfo.cpp
@@ -77,6 +77,18 @@ R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
}
}
+/// \returns true if \p MBBI can be moved into a new basic.
+bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI) const {
+ for (MachineInstr::const_mop_iterator I = MBBI->operands_begin(),
+ E = MBBI->operands_end(); I != E; ++I) {
+ if (I->isReg() && !TargetRegisterInfo::isVirtualRegister(I->getReg()) &&
+ I->isUse() && RI.isPhysRegLiveAcrossClauses(I->getReg()))
+ return false;
+ }
+ return true;
+}
+
unsigned R600InstrInfo::getIEQOpcode() const {
return AMDGPU::SETE_INT;
}
diff --git a/lib/Target/R600/R600InstrInfo.h b/lib/Target/R600/R600InstrInfo.h
index b29b91f..13d9810 100644
--- a/lib/Target/R600/R600InstrInfo.h
+++ b/lib/Target/R600/R600InstrInfo.h
@@ -55,6 +55,8 @@ namespace llvm {
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const;
+ bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI) const;
bool isTrig(const MachineInstr &MI) const;
bool isPlaceHolderOpcode(unsigned opcode) const;
--
1.8.1.4
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