[PATCH] [AArch64] Make FP instructions optional

[Amara Emerson]

Hi t.p.northover,

This change introduces a new subtarget feature, FPARMv8, and makes FP instructions predicated on it.

According to the AArch64 PCS, variadic functions do not have to save the FP/NEON registers to the register save area on entry if we can guarantee they won't be used. This change disables saving of these registers unless the FP feature is present.

As for defaults, I have added some code during subtarget initialization in order to make FP enabled by default for generic/unspecified CPUs.

Review appreciated.

http://llvm-reviews.chandlerc.com/D2052

Files:
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64InstrFormats.td
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/AArch64/AArch64Subtarget.cpp
  lib/Target/AArch64/AArch64Subtarget.h
  test/CodeGen/AArch64/alloca.ll
  test/CodeGen/AArch64/cond-sel.ll
  test/CodeGen/AArch64/directcond.ll
  test/CodeGen/AArch64/func-argpassing.ll
  test/CodeGen/AArch64/func-calls.ll
  test/CodeGen/AArch64/ldst-regoffset.ll
  test/CodeGen/AArch64/ldst-unscaledimm.ll
  test/CodeGen/AArch64/ldst-unsignedimm.ll
  test/CodeGen/AArch64/literal_pools.ll
  test/CodeGen/AArch64/neon-bitwise-instructions.ll
  test/CodeGen/AArch64/variadic.ll
  test/MC/AArch64/basic-a64-instructions.s
  test/MC/AArch64/fp-instructions.s
  test/MC/AArch64/fp-instructions.txt
  test/MC/Disassembler/AArch64/a64-ignored-fields.txt
  test/MC/Disassembler/AArch64/basic-a64-instructions.txt
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