[PATCH] [ARM] Implement eabi_attribute, cpu, and fpu directives.

[Richard Barton]

================
Comment at: lib/Target/ARM/ARMAsmPrinter.cpp:669
@@ +668,3 @@
+    else if (Subtarget->hasVFP4())
+      ATS.emitFPU(Subtarget->isFPOnlySP() ? ARM::VFPV4_D16 : ARM::VFPV4);
+    else if (Subtarget->hasVFP3())
----------------
Logan Chien wrote:
> After further testing, it seems that we have to use Subtarget->hasD16() instead.  However, I am not sure why was the old code using Subtarget->isFPOnlySP().  I will change this in next revision.  Any thoughts?
Yep - that is a bad miss on my part. I fear I've been guilty of being sloppy with my language in comments which might have caused confusion also.

The ..._D16 VFP architectures, single-precision only VFP architectures and half-precision are three distinct things.

VFPv3_D16 and VFPv4_D16 just means that there are half the number of FP registers available, both double- and single-precision (and sometimes half-preicions) VFP is available. These properties manifest in the Tag_FP_arch attribute.

Half-precision FP is an optional extension to VFPv3 and part of the base VFPv4 architecture. This property manifests in the Tag_FP_HP_extension attribute.

Single-precision-only FP is available for VFP architectures from version 2 and up and is described by a Tag_ABI_HardFP_use attribute value of 1.

I guess that the old code was just plain wrong, thanks for catching this and setting it right. 

This also highlights the importance of adding those R5 and M4 tests.


http://llvm-reviews.chandlerc.com/D1987