[llvm] r193354 - ARM: Mark double-precision instructions as such

[Tim Northover]

> It does not work as expected on msvc hosts.
>
> in single-precision-fp.s,
> <stdin>:72:9: error: instruction requires: double precision VFP
>         vmov.f64 d11, d10

Thanks for telling me.

Hmm. This is nasty. There are conflicting aliases for "vmov.f64" and
presumably this message is being caused by an indeterminacy in
TableGen. I've committed r193394 which should get things going again.

Longer term we've (probably) got two issues:
1. TableGen isn't deterministic here. I don't have Windows dev setup,
I don't suppose you could send me a copy of ARMGenAsmMatcher.inc from
some known revision?
2. ARM has conflicting aliases. This could cause two problems:
manually typed "vmov.f64" gets erroneously assembled as a NEON "vorr";
a hypothetical chip with NEON but no VFP may not diagnose "vmov.f64".
I've created PR17691 so we don't forget this, but I'm not sure it'll
be a priority for anyone in the near future.

Cheers.

Tim.