[PATCH] ARM: Mark double-precision instructions as such

[Tim Northover]

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Comment at: lib/Target/ARM/ARMInstrVFP.td:1231
@@ -1222,3 +1230,3 @@
           (VMLAD DPR:$dstin, DPR:$a, DPR:$b)>,
           Requires<[HasVFP2,UseFPVMLx,DontUseFusedMAC]>;
 def : Pat<(fadd_mlx SPR:$dstin, (fmul_su SPR:$a, SPR:$b)),
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Amara Emerson wrote:
> Do these patterns (and the others in this file) not need the predicate adding also?
It would probably be best, to guard against bugs elsewhere. Hopefully it won't make any difference since those nodes will all already have been lowered.

I'll get on it.


http://llvm-reviews.chandlerc.com/D2015