[llvm] r193322 - ARM: fix assert on unpredictable POP instruction.

[Tim Northover]

Author: tnorthover
Date: Thu Oct 24 04:37:18 2013
New Revision: 193322

URL: http://llvm.org/viewvc/llvm-project?rev=193322&view=rev
Log:
ARM: fix assert on unpredictable POP instruction.

POP instructions are aliased to the ARM LDM variants but have different syntax.
This caused two problems: we tried to access a non-existent operand to annotate
the '!', and the error message didn't make much sense.

With some vigorous hand-waving in the error message both problems can be
fixed.

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/diagnostics.s
    llvm/trunk/test/MC/ARM/thumb-diagnostics.s

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=193322&r1=193321&r2=193322&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Thu Oct 24 04:37:18 2013
@@ -5466,9 +5466,8 @@ validateInstruction(MCInst &Inst,
   case ARM::t2STMIA_UPD:
   case ARM::t2STMDB_UPD: {
     if (listContainsReg(Inst, 3, Inst.getOperand(0).getReg()))
-      return Error(Operands[4]->getStartLoc(),
-                   "writeback operator '!' not allowed when base register "
-                   "in register list");
+      return Error(Operands.back()->getStartLoc(),
+                   "writeback register not allowed in register list");
     break;
   }
   case ARM::tMUL: {

Modified: llvm/trunk/test/MC/ARM/diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/diagnostics.s?rev=193322&r1=193321&r2=193322&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/diagnostics.s (original)
+++ llvm/trunk/test/MC/ARM/diagnostics.s Thu Oct 24 04:37:18 2013
@@ -433,6 +433,8 @@
         ldm r2!, {r2, r3}
         ldmdb r2!, {r2, r3}
         ldmda r2!, {r2, r3}
-@ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list
-@ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list
-@ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list
+        popeq {sp}
+@ CHECK-ERRORS: error: writeback register not allowed in register list
+@ CHECK-ERRORS: error: writeback register not allowed in register list
+@ CHECK-ERRORS: error: writeback register not allowed in register list
+@ CHECK-ERRORS: error: writeback register not allowed in register list

Modified: llvm/trunk/test/MC/ARM/thumb-diagnostics.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb-diagnostics.s?rev=193322&r1=193321&r2=193322&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb-diagnostics.s (original)
+++ llvm/trunk/test/MC/ARM/thumb-diagnostics.s Thu Oct 24 04:37:18 2013
@@ -71,7 +71,7 @@ error: invalid operand for instruction
 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
 @ CHECK-ERRORS-V8:         ldm r2!, {r2, r3, r4, r10}
 @ CHECK-ERRORS-V8:               ^
-@ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
+@ CHECK-ERRORS-V8: error: writeback register not allowed in register list
 @ CHECK-ERRORS-V8:         ldmdb r2!, {r2, r3, r4}
 @ CHECK-ERRORS-V8:                 ^
 
@@ -100,7 +100,7 @@ error: invalid operand for instruction
 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
 @ CHECK-ERRORS-V8:         stm r2!, {r2, r9}
 @ CHECK-ERRORS-V8:                  ^
-@ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
+@ CHECK-ERRORS-V8: error: writeback register not allowed in register list
 @ CHECK-ERRORS-V8:         stmdb r2!, {r0, r2}
 @ CHECK-ERRORS-V8:                  ^