Outstanding SelectionDAG Patches
Tom Stellard
tom at stellard.net
Mon Oct 21 12:16:02 PDT 2013
Hi Nadav,
Here are some of the outstanding SelectionDAG patches that need review.
Thanks,
Tom
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>From 83a98926d4cb7251ea7198978e8a0e8f073621e8 Mon Sep 17 00:00:00 2001
From: Justin Holewinski <jholewinski at nvidia.com>
Date: Thu, 8 Aug 2013 15:17:27 -0400
Subject: [PATCH] SelectionDAG: Pass along the original argument/element type
in ISD::InputArg
For some targets, it is useful to be able to look at the original
type of an argument without having to dig through the original IR.
This also fixes a bug in SelectionDAGBuilder where InputArg.PartOffset
was not taking into account the offset of structure elements.
Patch by: Justin Holewinski
Tom Stellard:
- Changed the type of ArgVT to EVT, so it can store non-simple types
like v3i32.
---
R600 patches which use this feature will be sent to the list shortly.
include/llvm/Target/TargetCallingConv.h | 8 ++++++--
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 13 ++++++++-----
lib/CodeGen/TargetLoweringBase.cpp | 2 +-
3 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/include/llvm/Target/TargetCallingConv.h b/include/llvm/Target/TargetCallingConv.h
index 1fd0bd9..9cc52a5 100644
--- a/include/llvm/Target/TargetCallingConv.h
+++ b/include/llvm/Target/TargetCallingConv.h
@@ -113,6 +113,7 @@ namespace ISD {
struct InputArg {
ArgFlagsTy Flags;
MVT VT;
+ EVT ArgVT;
bool Used;
/// Index original Function's argument.
@@ -124,10 +125,11 @@ namespace ISD {
unsigned PartOffset;
InputArg() : VT(MVT::Other), Used(false) {}
- InputArg(ArgFlagsTy flags, EVT vt, bool used,
+ InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used,
unsigned origIdx, unsigned partOffs)
: Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) {
VT = vt.getSimpleVT();
+ ArgVT = argvt;
}
};
@@ -138,6 +140,7 @@ namespace ISD {
struct OutputArg {
ArgFlagsTy Flags;
MVT VT;
+ EVT ArgVT;
/// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
bool IsFixed;
@@ -151,11 +154,12 @@ namespace ISD {
unsigned PartOffset;
OutputArg() : IsFixed(false) {}
- OutputArg(ArgFlagsTy flags, EVT vt, bool isfixed,
+ OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed,
unsigned origIdx, unsigned partOffs)
: Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
PartOffset(partOffs) {
VT = vt.getSimpleVT();
+ ArgVT = argvt;
}
};
}
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 0971e8a..530e0b6 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1268,7 +1268,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
for (unsigned i = 0; i < NumParts; ++i) {
Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
- /*isfixed=*/true, 0, 0));
+ VT, /*isfixed=*/true, 0, 0));
OutVals.push_back(Parts[i]);
}
}
@@ -6740,6 +6740,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
for (unsigned i = 0; i != NumRegs; ++i) {
ISD::InputArg MyFlags;
MyFlags.VT = RegisterVT;
+ MyFlags.ArgVT = VT;
MyFlags.Used = CLI.IsReturnValueUsed;
if (CLI.RetSExt)
MyFlags.Flags.setSExt();
@@ -6829,7 +6830,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
for (unsigned j = 0; j != NumParts; ++j) {
// if it isn't first piece, alignment must be 1
- ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(),
+ ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(), VT,
i < CLI.NumFixedArgs,
i, j*Parts[j].getValueType().getStoreSize());
if (NumParts > 1 && j == 0)
@@ -6968,7 +6969,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
ISD::ArgFlagsTy Flags;
Flags.setSRet();
MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]);
- ISD::InputArg RetArg(Flags, RegisterVT, true, 0, 0);
+ ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true, 0, 0);
Ins.push_back(RetArg);
}
@@ -6979,6 +6980,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
SmallVector<EVT, 4> ValueVTs;
ComputeValueVTs(*TLI, I->getType(), ValueVTs);
bool isArgValueUsed = !I->use_empty();
+ unsigned PartBase = 0;
for (unsigned Value = 0, NumValues = ValueVTs.size();
Value != NumValues; ++Value) {
EVT VT = ValueVTs[Value];
@@ -7016,8 +7018,8 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
MVT RegisterVT = TLI->getRegisterType(*CurDAG->getContext(), VT);
unsigned NumRegs = TLI->getNumRegisters(*CurDAG->getContext(), VT);
for (unsigned i = 0; i != NumRegs; ++i) {
- ISD::InputArg MyFlags(Flags, RegisterVT, isArgValueUsed,
- Idx-1, i*RegisterVT.getStoreSize());
+ ISD::InputArg MyFlags(Flags, RegisterVT, VT, isArgValueUsed,
+ Idx-1, PartBase+i*RegisterVT.getStoreSize());
if (NumRegs > 1 && i == 0)
MyFlags.Flags.setSplit();
// if it isn't first piece, alignment must be 1
@@ -7025,6 +7027,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
MyFlags.Flags.setOrigAlign(1);
Ins.push_back(MyFlags);
}
+ PartBase += VT.getStoreSize();
}
}
diff --git a/lib/CodeGen/TargetLoweringBase.cpp b/lib/CodeGen/TargetLoweringBase.cpp
index 7d28ed4..d0ed46e 100644
--- a/lib/CodeGen/TargetLoweringBase.cpp
+++ b/lib/CodeGen/TargetLoweringBase.cpp
@@ -1195,7 +1195,7 @@ void llvm::GetReturnInfo(Type* ReturnType, AttributeSet attr,
Flags.setZExt();
for (unsigned i = 0; i < NumParts; ++i)
- Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true, 0, 0));
+ Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, /*isFixed=*/true, 0, 0));
}
}
--
1.7.11.4
-------------- next part --------------
Index: include/llvm/Target/TargetLowering.h
===================================================================
--- include/llvm/Target/TargetLowering.h
+++ include/llvm/Target/TargetLowering.h
@@ -1,14 +1,18 @@
/// otherwise it will assert.
EVT getValueType(Type *Ty, bool AllowUnknown = false) const {
// Lower scalar pointers to native pointer types.
- if (Ty->isPointerTy()) return getPointerTy(Ty->getPointerAddressSpace());
+ if (PointerType *PTy = dyn_cast<PointerType>(Ty))
+ return getPointerTy(PTy->getAddressSpace());
if (Ty->isVectorTy()) {
VectorType *VTy = cast<VectorType>(Ty);
Type *Elm = VTy->getElementType();
// Lower vectors of pointers to native pointer types.
- if (Elm->isPointerTy())
- Elm = EVT(PointerTy).getTypeForEVT(Ty->getContext());
+ if (PointerType *PT = dyn_cast<PointerType>(Elm)) {
+ EVT PointerTy(getPointerTy(PT->getAddressSpace()));
+ Elm = PointerTy.getTypeForEVT(Ty->getContext());
+ }
+
return EVT::getVectorVT(Ty->getContext(), EVT::getEVT(Elm, false),
VTy->getNumElements());
}
Index: test/CodeGen/R600/gep-address-space.ll
===================================================================
--- test/CodeGen/R600/gep-address-space.ll
+++ test/CodeGen/R600/gep-address-space.ll
@@ -1,3 +1,33 @@
ret void
}
+define void @gep_as_vector_v4(<4 x [1024 x i32] addrspace(3)*> %array) nounwind {
+; CHECK-LABEL: @gep_as_vector_v4:
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+ %p = getelementptr <4 x [1024 x i32] addrspace(3)*> %array, <4 x i16> zeroinitializer, <4 x i16> <i16 16, i16 16, i16 16, i16 16>
+ %p0 = extractelement <4 x i32 addrspace(3)*> %p, i32 0
+ %p1 = extractelement <4 x i32 addrspace(3)*> %p, i32 1
+ %p2 = extractelement <4 x i32 addrspace(3)*> %p, i32 2
+ %p3 = extractelement <4 x i32 addrspace(3)*> %p, i32 3
+ store i32 99, i32 addrspace(3)* %p0
+ store i32 99, i32 addrspace(3)* %p1
+ store i32 99, i32 addrspace(3)* %p2
+ store i32 99, i32 addrspace(3)* %p3
+ ret void
+}
+
+define void @gep_as_vector_v2(<2 x [1024 x i32] addrspace(3)*> %array) nounwind {
+; CHECK-LABEL: @gep_as_vector_v2:
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+ %p = getelementptr <2 x [1024 x i32] addrspace(3)*> %array, <2 x i16> zeroinitializer, <2 x i16> <i16 16, i16 16>
+ %p0 = extractelement <2 x i32 addrspace(3)*> %p, i32 0
+ %p1 = extractelement <2 x i32 addrspace(3)*> %p, i32 1
+ store i32 99, i32 addrspace(3)* %p0
+ store i32 99, i32 addrspace(3)* %p1
+ ret void
+}
+
-------------- next part --------------
>From 7eac6b3b9201144e37e57f977871ea3249b2ce37 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard at amd.com>
Date: Tue, 15 Oct 2013 14:59:32 -0400
Subject: [PATCH] SelectionDAG: Use the correct pointer width in
SelectionDAG::InferPtrAlignment()
---
lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +-
test/CodeGen/R600/address-space.ll | 9 +++++++++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 1756f94..daeb97b 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6276,7 +6276,7 @@ unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
int64_t GVOffset = 0;
const TargetLowering *TLI = TM.getTargetLowering();
if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
- unsigned PtrWidth = TLI->getPointerTy().getSizeInBits();
+ unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
TLI->getDataLayout());
diff --git a/test/CodeGen/R600/address-space.ll b/test/CodeGen/R600/address-space.ll
index d8e6c63..ff8be50 100644
--- a/test/CodeGen/R600/address-space.ll
+++ b/test/CodeGen/R600/address-space.ll
@@ -39,3 +39,12 @@ entry:
ret void
}
+; Test for a crash in SelectionDAG::InferPtrAlignment()
+; CHECK-LABEL: @integral_cols
+; CHECK: DS_READ_B32
+define void @integral_cols(i32 addrspace(1)* %out) {
+entry:
+ %0 = load i32 addrspace(3)* getelementptr inbounds ([2 x [264 x i32]] addrspace(3)* @local.mem, i32 0, i32 1, i32 262), align 16
+ store i32 %0, i32 addrspace(1)* %out
+ ret void
+}
--
1.8.1.5
-------------- next part --------------
Index: lib/CodeGen/AsmPrinter/AsmPrinter.cpp
===================================================================
--- lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -997,7 +997,7 @@
case Instruction::GetElementPtr: {
const DataLayout &DL = *AP.TM.getDataLayout();
// Generate a symbolic expression for the byte address
- APInt OffsetAI(DL.getPointerSizeInBits(), 0);
+ APInt OffsetAI(DL.getPointerTypeSizeInBits(CE->getType()), 0);
cast<GEPOperator>(CE)->accumulateConstantOffset(DL, OffsetAI);
const MCExpr *Base = lowerConstant(CE->getOperand(0), AP);
@@ -1023,7 +1023,7 @@
// Handle casts to pointers by changing them into casts to the appropriate
// integer type. This promotes constant folding and simplifies this code.
Constant *Op = CE->getOperand(0);
- Op = ConstantExpr::getIntegerCast(Op, DL.getIntPtrType(CV->getContext()),
+ Op = ConstantExpr::getIntegerCast(Op, DL.getIntPtrType(CV->getType()),
false/*ZExt*/);
return lowerConstant(Op, AP);
}
Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -997,10 +997,12 @@
}
void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
- SDValue N = getValue(I.getOperand(0));
+ Value *Op0 = I.getOperand(0);
// Note that the pointer operand may be a vector of pointers. Take the scalar
// element which holds a pointer.
- Type *Ty = I.getOperand(0)->getType()->getScalarType();
+ Type *Ty = Op0->getType()->getScalarType();
+ unsigned AS = Ty->getPointerAddressSpace();
+ SDValue N = getValue(Op0);
for (GetElementPtrInst::const_op_iterator OI = I.op_begin()+1, E = I.op_end();
OI != E; ++OI) {
@@ -1016,10 +1018,6 @@
Ty = StTy->getElementType(Field);
} else {
- uint32_t AS = 0;
- if (PointerType *PtrType = dyn_cast<PointerType>(Ty)) {
- AS = PtrType->getAddressSpace();
- }
Ty = cast<SequentialType>(Ty)->getElementType();
// If this is a constant subscript, handle it quickly.
Index: test/CodeGen/R600/gep-address-space.ll
===================================================================
--- /dev/null
+++ test/CodeGen/R600/gep-address-space.ll
@@ -0,0 +1,10 @@
+; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck %s
+
+define void @use_gep_address_space([1024 x i32] addrspace(3)* %array) nounwind {
+; CHECK-LABEL @use_gep_address_space:
+; CHECK: ADD_I32
+ %p = getelementptr [1024 x i32] addrspace(3)* %array, i16 0, i16 16
+ store i32 99, i32 addrspace(3)* %p
+ ret void
+}
+
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