[PATCH] [mips][msa] Build all the tests in little and big endian modes and correct an incorrect test.

[Daniel Sanders]

This patch (correctly) breaks some MSA tests by exposing the cases when
SelectionDAG::getConstant() produces illegal types. These have been temporarily
marked XFAIL and the XFAIL flag will be removed when
SelectionDAG::getConstant() is fixed.

There are two categories of failure:
* Immediate instructions are not selected in one endian mode.
* Immediates used in ldi.[bhwd] must be different according to endianness.
  (this only affects cases where the 'wrong' ldi is used to load the correct
   bitpattern. E.g. (bitcast:v2i64 (build_vector:v4i32 ...)))

One test needed correcting to expect different output depending on whether big
or little endian was in use. This test was
test/CodeGen/Mips/msa/basic_operations.ll and experiences the second category
of failure shown above.

Depends on D1374.
Depends on D1971.

http://llvm-reviews.chandlerc.com/D1972

Files:
  test/CodeGen/Mips/msa/2r.ll
  test/CodeGen/Mips/msa/2r_vector_scalar.ll
  test/CodeGen/Mips/msa/2rf.ll
  test/CodeGen/Mips/msa/2rf_exup.ll
  test/CodeGen/Mips/msa/2rf_float_int.ll
  test/CodeGen/Mips/msa/2rf_fq.ll
  test/CodeGen/Mips/msa/2rf_int_float.ll
  test/CodeGen/Mips/msa/2rf_tq.ll
  test/CodeGen/Mips/msa/3r-a.ll
  test/CodeGen/Mips/msa/3r-b.ll
  test/CodeGen/Mips/msa/3r-c.ll
  test/CodeGen/Mips/msa/3r-d.ll
  test/CodeGen/Mips/msa/3r-i.ll
  test/CodeGen/Mips/msa/3r-m.ll
  test/CodeGen/Mips/msa/3r-p.ll
  test/CodeGen/Mips/msa/3r-s.ll
  test/CodeGen/Mips/msa/3r-v.ll
  test/CodeGen/Mips/msa/3r_4r.ll
  test/CodeGen/Mips/msa/3r_4r_widen.ll
  test/CodeGen/Mips/msa/3r_splat.ll
  test/CodeGen/Mips/msa/3rf.ll
  test/CodeGen/Mips/msa/3rf_4rf.ll
  test/CodeGen/Mips/msa/3rf_4rf_q.ll
  test/CodeGen/Mips/msa/3rf_exdo.ll
  test/CodeGen/Mips/msa/3rf_float_int.ll
  test/CodeGen/Mips/msa/3rf_int_float.ll
  test/CodeGen/Mips/msa/3rf_q.ll
  test/CodeGen/Mips/msa/arithmetic.ll
  test/CodeGen/Mips/msa/arithmetic_float.ll
  test/CodeGen/Mips/msa/basic_operations.ll
  test/CodeGen/Mips/msa/basic_operations_float.ll
  test/CodeGen/Mips/msa/bit.ll
  test/CodeGen/Mips/msa/bitcast.ll
  test/CodeGen/Mips/msa/bitwise.ll
  test/CodeGen/Mips/msa/compare.ll
  test/CodeGen/Mips/msa/compare_float.ll
  test/CodeGen/Mips/msa/elm_copy.ll
  test/CodeGen/Mips/msa/elm_cxcmsa.ll
  test/CodeGen/Mips/msa/elm_insv.ll
  test/CodeGen/Mips/msa/elm_move.ll
  test/CodeGen/Mips/msa/elm_shift_slide.ll
  test/CodeGen/Mips/msa/endian.ll
  test/CodeGen/Mips/msa/i10.ll
  test/CodeGen/Mips/msa/i5-a.ll
  test/CodeGen/Mips/msa/i5-b.ll
  test/CodeGen/Mips/msa/i5-c.ll
  test/CodeGen/Mips/msa/i5-m.ll
  test/CodeGen/Mips/msa/i5-s.ll
  test/CodeGen/Mips/msa/i5_ld_st.ll
  test/CodeGen/Mips/msa/i8.ll
  test/CodeGen/Mips/msa/llvm-stress-s1935737938.ll
  test/CodeGen/Mips/msa/llvm-stress-s3997499501.ll
  test/CodeGen/Mips/msa/llvm-stress-s525530439.ll
  test/CodeGen/Mips/msa/llvm-stress-s997348632.ll
  test/CodeGen/Mips/msa/llvm-stress-sz1-s742806235.ll
  test/CodeGen/Mips/msa/shuffle.ll
  test/CodeGen/Mips/msa/spill.ll
  test/CodeGen/Mips/msa/vecs10.ll
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