[llvm] r192890 - Fix tests not to depend on specific regalloc or instruction order.

[Benjamin Kramer]

Author: d0k
Date: Thu Oct 17 07:41:05 2013
New Revision: 192890

URL: http://llvm.org/viewvc/llvm-project?rev=192890&view=rev
Log:
Fix tests not to depend on specific regalloc or instruction order.

They were failing with -mcpu=atom.

Modified:
    llvm/trunk/test/CodeGen/X86/widen_conv-2.ll
    llvm/trunk/test/CodeGen/X86/x86-64-tls-1.ll

Modified: llvm/trunk/test/CodeGen/X86/widen_conv-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_conv-2.ll?rev=192890&r1=192889&r2=192890&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_conv-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_conv-2.ll Thu Oct 17 07:41:05 2013
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -march=x86 -mattr=+sse4.2 | FileCheck %s
-; CHECK: cwtl
-; CHECK: cwtl
+; CHECK: {{cwtl|movswl}}
+; CHECK: {{cwtl|movswl}}
 
 ; sign extension v2i32 to v2i16
 

Modified: llvm/trunk/test/CodeGen/X86/x86-64-tls-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-tls-1.ll?rev=192890&r1=192889&r2=192890&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-tls-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-tls-1.ll Thu Oct 17 07:41:05 2013
@@ -3,8 +3,8 @@
 define i64 @z() nounwind {
 ; FIXME: The codegen here is primitive at best and could be much better.
 ; The add and the moves can be folded together.
-; CHECK: movq    $tm_nest_level at TPOFF, %rcx
-; CHECK: movq    %fs:0, %rax
+; CHECK-DAG: movq    $tm_nest_level at TPOFF, %rcx
+; CHECK-DAG: movq    %fs:0, %rax
 ; CHECK: addl    %ecx, %eax
   ret i64 and (i64 ptrtoint (i32* @tm_nest_level to i64), i64 100)
 }