[llvm] r192812 - R600: Remove some dead code from the AMDILCFGStructurizer

Tom Stellard thomas.stellard at amd.com
Wed Oct 16 10:05:56 PDT 2013


Author: tstellar
Date: Wed Oct 16 12:05:56 2013
New Revision: 192812

URL: http://llvm.org/viewvc/llvm-project?rev=192812&view=rev
Log:
R600: Remove some dead code from the AMDILCFGStructurizer

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

Modified:
    llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp

Modified: llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp?rev=192812&r1=192811&r2=192812&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp Wed Oct 16 12:05:56 2013
@@ -1335,32 +1335,11 @@ int AMDGPUCFGStructurizer::improveSimple
   // add initReg = initVal to headBlk
 
   const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32);
-  unsigned InitReg =
-    HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC);
   if (!MigrateTrue || !MigrateFalse)
     llvm_unreachable("Extra register needed to handle CFG");
 
   int NumNewBlk = 0;
 
-  if (!LandBlk) {
-    LandBlk = HeadMBB->getParent()->CreateMachineBasicBlock();
-    HeadMBB->getParent()->push_back(LandBlk);  //insert to function
-
-    if (TrueMBB) {
-      TrueMBB->addSuccessor(LandBlk);
-    } else {
-      HeadMBB->addSuccessor(LandBlk);
-    }
-
-    if (FalseMBB) {
-      FalseMBB->addSuccessor(LandBlk);
-    } else {
-      HeadMBB->addSuccessor(LandBlk);
-    }
-
-    NumNewBlk ++;
-  }
-
   bool LandBlkHasOtherPred = (LandBlk->pred_size() > 2);
 
   //insert AMDGPU::ENDIF to avoid special case "input landBlk == NULL"
@@ -1375,6 +1354,10 @@ int AMDGPUCFGStructurizer::improveSimple
         CmpResReg, DebugLoc());
   }
 
+  // XXX: We are running this after RA, so creating virtual registers will
+  // cause an assertion failure in the PostRA scheduling pass.
+  unsigned InitReg =
+    HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC);
   insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET, InitReg,
       DebugLoc());
 





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