[Patch] Only pass f32/v4f32 in xmm registers in x86-64 if only sse1 is suppored
Nadav Rotem
nrotem at apple.com
Wed Oct 16 09:31:38 PDT 2013
I am not sure. Do we know what GCC and ICC do? According to this[1] on x86-32bit floats are passed on ST0.
[1] - https://developer.apple.com/library/mac/documentation/developertools/conceptual/LowLevelABI/130-IA-32_Function_Calling_Conventions/IA32.html
On Oct 16, 2013, at 7:54 AM, Craig Topper <craig.topper at gmail.com> wrote:
> Nadav, what do you think?
>
>
> On Thu, Oct 10, 2013 at 6:14 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote:
> FP passed in XMM starting from SSE2.
>
>
>
> Intel SSE processor did not support 64-bit mode and all parameters were in FP stack (X87) registers.
>
>
>
> - Elena
>
>
>
> From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Craig Topper
> Sent: Thursday, October 10, 2013 07:00
> To: llvm-commits at cs.uiuc.edu
> Subject: [Patch] Only pass f32/v4f32 in xmm registers in x86-64 if only sse1 is suppored
>
>
>
> Not sure if this is actually the right thing to do, but it fixes an issue on llvm-dev where XMM->FP copy was being created.
>
>
>
> This patches makes integer vector types and f64 only pass in xmm if sse2 is enabled which is when these types are assigned to the xmm class.
>
>
>
> --
> ~Craig
>
> ---------------------------------------------------------------------
> Intel Israel (74) Limited
>
> This e-mail and any attachments may contain confidential material for
> the sole use of the intended recipient(s). Any review or distribution
> by others is strictly prohibited. If you are not the intended
> recipient, please contact the sender and delete all copies.
>
>
>
>
> --
> ~Craig
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20131016/3e52fb63/attachment.html>
More information about the llvm-commits
mailing list