[PATCH] [1/2] Add PRFCHW feature to a few AMD processors

[Yunzhong Gao]

  With the new changes in lib/Target/X86/X86ISelLowering.cpp, the backend cannot select this intrinsic:
  "@llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 )"
  The backend can only select the following intrinsic:
  "@llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 )"
  I think I might have to revert my changes in lib/Target/X86/X86ISelLowering.cpp.

http://llvm-reviews.chandlerc.com/D1933