[llvm] r192591 - Add Cortex-A57 support

[Bernard Ogden]

Author: bogden
Date: Mon Oct 14 08:17:07 2013
New Revision: 192591

URL: http://llvm.org/viewvc/llvm-project?rev=192591&view=rev
Log:
Add Cortex-A57 support

Modified:
    llvm/trunk/lib/Target/ARM/ARM.td
    llvm/trunk/lib/Target/ARM/ARMSubtarget.h
    llvm/trunk/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll

Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=192591&r1=192590&r2=192591&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Mon Oct 14 08:17:07 2013
@@ -203,6 +203,12 @@ def ProcA53     : SubtargetFeature<"a53"
                                     FeatureTrustZone, FeatureT2XtPk,
                                     FeatureCrypto]>;
 
+def ProcA57     : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
+                                   "Cortex-A57 ARM processors",
+                                   [FeatureMP, FeatureHWDiv, FeatureHWDivARM,
+                                    FeatureTrustZone, FeatureT2XtPk,
+                                    FeatureCrypto]>;
+
 def ProcR5      : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
                                    "Cortex-R5 ARM processors",
                                    [FeatureSlowFPBrcc,
@@ -326,6 +332,9 @@ def : ProcessorModel<"swift",       Swif
 def : ProcNoItin<"cortex-a53",      [ProcA53, HasV8Ops, FeatureAClass,
                                     FeatureDB, FeatureFPARMv8,
                                     FeatureNEON, FeatureDSPThumb2]>;
+def : ProcNoItin<"cortex-a57",      [ProcA57, HasV8Ops, FeatureAClass,
+                                    FeatureDB, FeatureFPARMv8,
+                                    FeatureNEON, FeatureDSPThumb2]>;
 
 //===----------------------------------------------------------------------===//
 // Register File Description

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=192591&r1=192590&r2=192591&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Mon Oct 14 08:17:07 2013
@@ -31,7 +31,7 @@ class TargetOptions;
 class ARMSubtarget : public ARMGenSubtargetInfo {
 protected:
   enum ARMProcFamilyEnum {
-    Others, CortexA5, CortexA8, CortexA9, CortexA15, CortexR5, Swift, CortexA53
+    Others, CortexA5, CortexA8, CortexA9, CortexA15, CortexR5, Swift, CortexA53, CortexA57
   };
   enum ARMProcClassEnum {
     None, AClass, RClass, MClass

Modified: llvm/trunk/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll?rev=192591&r1=192590&r2=192591&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll Mon Oct 14 08:17:07 2013
@@ -14,6 +14,7 @@
 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CORTEX-M4
 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
+; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
 ; This tests that MC/asm header conversion is smooth and that build attributes are correct
 ;
 
@@ -147,6 +148,18 @@
 ; CORTEX-A53:  .eabi_attribute 25, 1
 ; CORTEX-A53:  .eabi_attribute 44, 2
 
+; CORTEX-A57:  .cpu cortex-a57
+; CORTEX-A57:  .eabi_attribute 6, 14
+; CORTEX-A57:  .eabi_attribute 7, 65
+; CORTEX-A57:  .eabi_attribute 8, 1
+; CORTEX-A57:  .eabi_attribute 9, 2
+; CORTEX-A57:  .fpu crypto-neon-fp-armv8
+; CORTEX-A57:  .eabi_attribute 10, 7
+; CORTEX-A57:  .eabi_attribute 12, 3
+; CORTEX-A57:  .eabi_attribute 24, 1
+; CORTEX-A57:  .eabi_attribute 25, 1
+; CORTEX-A57:  .eabi_attribute 44, 2
+
 define i32 @f(i64 %z) {
 	ret i32 0
 }