[PATCH] Fix edge condition in DAGCombiner to improve codegen of shift sequences.

[Andrea_DiBiagio at sn.scee.net]

Ping.

Please let me know if it is ok to submit.

Thanks.

llvm-commits-bounces at cs.uiuc.edu wrote on 07/10/2013 12:21:27:

> From: Andrea_DiBiagio at sn.scee.net
> To: llvm-commits at cs.uiuc.edu, 
> Date: 07/10/2013 12:23
> Subject: [PATCH] Fix edge condition in DAGCombiner to improve 
> codegen of shift sequences.
> Sent by: llvm-commits-bounces at cs.uiuc.edu
> 
> When canonicalizing dags according to the rule 
>  (shl (zext (shr X, c1) ), c1) ==> (zext (shl (shr X, c1) c1) )
> 
> remeber to add the new shl dag to the DAGCombiner worklist of nodes.
> If we don't explicitly add it to the worklist of nodes to visit, we may 
> not
> trigger later on the rule that folds the shift left + logical shift 
right
> into a AND instruction with bitmask.
> 
>   fold (shl (srl x, c1), c1) ==> (and x, MASK).
> 
> This happens for example when generating code for the following IR 
> sequence:
> 
>  define void @g(i32 %a) {
>    %b = lshr i32 %a, 2
>    %c = zext i32 %b to i64
>    %d = add i64 %c, 1
>    %e = shl i64 %c, 2
>    tail call void @f(i64 %e)
>    ret void
>  }
> 
> A first run of the dagcombiner would not trigger the canonicalization
> of the shl-zext-shr sequence because there are two users of the zext.
> 
> DAGCombiner will be able to remove the dead 'add' instruction and 
> decrease the number of users of zext.
> 
> DAGCombiner is then rerun again after legalization;
> this time the canonicalization rule is correctly triggered and the dag
> is rewritten pushing the zext outside of the sequence shl-zext-shr.
> 
> However, since we don't explicitly add the new shl dag node to the
> worklist of nodes to combine, we are unable to further simplify the 
> shl-shr
> sequence into a AND with bitmask.
> That is because DAGCombiner would push the new zext and its users to 
> the worklist, but not the shl.
> 
> Before this fix, the IR sequence above produced the following code:
> 
>   shrl $2, %edi
>   shll $2, %edi
>   jmp f
> 
> With this fix we now correctly generate
> 
>   andl $-4, %edi
>   jmp f 
> 
> Please let me know what do you think.
> 
> 
> 
> Thanks,
> Andrea Di Biagio
> SN Systems - Sony Computer Entertainment Group
> 
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



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