[llvm] r192483 - Mips: Disassemble sign-extended 64 bit immediates properly.

[Benjamin Kramer]

Author: d0k
Date: Fri Oct 11 14:05:08 2013
New Revision: 192483

URL: http://llvm.org/viewvc/llvm-project?rev=192483&view=rev
Log:
Mips: Disassemble sign-extended 64 bit immediates properly.

This doesn't change the meaning of the output, but makes look right. PR17539.

Modified:
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
    llvm/trunk/test/MC/Disassembler/Mips/mips64.txt

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=192483&r1=192482&r2=192483&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Fri Oct 11 14:05:08 2013
@@ -262,7 +262,9 @@ def uimm20      : Operand<i32> {
 def uimm10      : Operand<i32> {
 }
 
-def simm16_64   : Operand<i64>;
+def simm16_64   : Operand<i64> {
+  let DecoderMethod = "DecodeSimm16";
+}
 
 // Unsigned Operand
 def uimm5       : Operand<i32> {

Modified: llvm/trunk/test/MC/Disassembler/Mips/mips64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/mips64.txt?rev=192483&r1=192482&r2=192483&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/mips64.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/mips64.txt Fri Oct 11 14:05:08 2013
@@ -2,6 +2,9 @@
 # CHECK: daddiu $11, $26, 31949
 0x67 0x4b 0x7c 0xcd
 
+# CHECK: daddiu $sp, $sp, -32
+0x67 0xbd 0xff 0xe0
+
 # CHECK: daddu $26, $1, $11
 0x00 0x2b 0xd0 0x2d