[PATCH] R600: Fix trunc i64 to i32 on SI

[Tom Stellard]

On Wed, Oct 09, 2013 at 04:23:55PM -0700, Matt Arsenault wrote:
>   Attach right patch
> 
> http://llvm-reviews.chandlerc.com/D1882
> 
> CHANGE SINCE LAST DIFF
>   http://llvm-reviews.chandlerc.com/D1882?vs=4791&id=4792#toc
> 
> Files:
>   lib/Target/R600/SIInstructions.td
>   test/CodeGen/R600/trunc.ll
> 

LGTM

> Index: lib/Target/R600/SIInstructions.td
> ===================================================================
> --- lib/Target/R600/SIInstructions.td
> +++ lib/Target/R600/SIInstructions.td
> @@ -851,6 +851,11 @@
>    (V_CNDMASK_B32_e64 $src0, $src1, $src2)
>  >;
>  
> +def : Pat <
> +  (i32 (trunc i64:$val)),
> +  (EXTRACT_SUBREG $val, sub0)
> +>;
> +
>  //use two V_CNDMASK_B32_e64 instructions for f64
>  def : Pat <
>    (f64 (select i1:$src2, f64:$src1, f64:$src0)),
> Index: test/CodeGen/R600/trunc.ll
> ===================================================================
> --- test/CodeGen/R600/trunc.ll
> +++ test/CodeGen/R600/trunc.ll
> @@ -17,3 +17,15 @@
>    ret void
>  }
>  
> +; SI-LABEL: @trunc_shl_i64:
> +; SI: S_LOAD_DWORDX2
> +; SI: S_LOAD_DWORDX2 [[SREG:SGPR[0-9]+_SGPR[0-9]+]]
> +; SI: V_LSHL_B64 [[LO_VREG:VGPR[0-9]+]]_VGPR{{[0-9]+}}, [[SREG]], 2
> +; SI-NOT: [[LO_VREG]]
> +; SI: BUFFER_STORE_DWORD [[LO_VREG]],
> +define void @trunc_shl_i64(i32 addrspace(1)* %out, i64 %a) {
> +  %b = shl i64 %a, 2
> +  %result = trunc i64 %b to i32
> +  store i32 %result, i32 addrspace(1)* %out, align 4
> +  ret void
> +}

> Index: lib/Target/R600/SIInstructions.td
> ===================================================================
> --- lib/Target/R600/SIInstructions.td
> +++ lib/Target/R600/SIInstructions.td
> @@ -851,6 +851,11 @@
>    (V_CNDMASK_B32_e64 $src0, $src1, $src2)
>  >;
>  
> +def : Pat <
> +  (i32 (trunc i64:$val)),
> +  (EXTRACT_SUBREG $val, sub0)
> +>;
> +
>  //use two V_CNDMASK_B32_e64 instructions for f64
>  def : Pat <
>    (f64 (select i1:$src2, f64:$src1, f64:$src0)),
> Index: test/CodeGen/R600/trunc.ll
> ===================================================================
> --- test/CodeGen/R600/trunc.ll
> +++ test/CodeGen/R600/trunc.ll
> @@ -17,3 +17,15 @@
>    ret void
>  }
>  
> +; SI-LABEL: @trunc_shl_i64:
> +; SI: S_LOAD_DWORDX2
> +; SI: S_LOAD_DWORDX2 [[SREG:SGPR[0-9]+_SGPR[0-9]+]]
> +; SI: V_LSHL_B64 [[LO_VREG:VGPR[0-9]+]]_VGPR{{[0-9]+}}, [[SREG]], 2
> +; SI-NOT: [[LO_VREG]]
> +; SI: BUFFER_STORE_DWORD [[LO_VREG]],
> +define void @trunc_shl_i64(i32 addrspace(1)* %out, i64 %a) {
> +  %b = shl i64 %a, 2
> +  %result = trunc i64 %b to i32
> +  store i32 %result, i32 addrspace(1)* %out, align 4
> +  ret void
> +}

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