[PATCH] ARM: correct liveness on ldm/stm combiner

Renato Golin renato.golin at linaro.org
Thu Oct 10 02:21:44 PDT 2013


On 10 October 2013 10:12, Tim Northover <t.p.northover at gmail.com> wrote:

> I don't think it will. This pass is run after register-allocation, and
> from what I can tell all of his changes take place before.
>

Yes, they do. I meant if his changes might make yours redundant, by letting
the register allocator see these cases before it gets to your change, and
do something different about it. I guess we'll see, anyway.


The order becomes s3, {s0, s1}, s2.
>

I meant the "wrong" order, ie. the one that wouldn't generate a vldmia. But
that's irrelevant.



> I believe that if the vldmia ends up at the top then this code-path
> won't be exercised, so the order is worth checking. I'll put a comment
> in to that effect.
>

Ok. LGTM.

Thanks,
--renato
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