R600: Some fixes
Tom Stellard
tom at stellard.net
Tue Oct 8 17:38:22 PDT 2013
On Tue, Oct 08, 2013 at 05:58:58AM -0700, Vincent Lejeune wrote:
> Hi,
>
> another couple of fixes for R600.
>
> The first one remove the VPM bit in export instructions. While I didn't see any change when this bit is set or cleared, the doc recommand to left it cleared
> as SB does.
> The second one fixes a rather rare bug that was uncovered by vs-varying-mat3-wr piglit test.
> The last one is from the last serie and is improved following Tom's comments.
>
All three patches are:
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
-Tom
> Vincent
> From a9ca6b1d9557992ded0d2044413f947ce74ca253 Mon Sep 17 00:00:00 2001
> From: Vincent Lejeune <vljn at ovi.com>
> Date: Tue, 24 Sep 2013 00:43:19 +0200
> Subject: [PATCH 1/3] R600: Clear the VPM bit of export instructions.
>
> It makes apparently no change it to set this bit or not but the
> docs recommand to left it cleared.
> ---
> lib/Target/R600/R600Instructions.td | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
> index f0c061e..0734cca 100644
> --- a/lib/Target/R600/R600Instructions.td
> +++ b/lib/Target/R600/R600Instructions.td
> @@ -1178,7 +1178,7 @@ let Predicates = [isR600] in {
> def R600_ExportSwz : ExportSwzInst {
> let Word1{20-17} = 0; // BURST_COUNT
> let Word1{21} = eop;
> - let Word1{22} = 1; // VALID_PIXEL_MODE
> + let Word1{22} = 0; // VALID_PIXEL_MODE
> let Word1{30-23} = inst;
> let Word1{31} = 1; // BARRIER
> }
> @@ -1187,7 +1187,7 @@ let Predicates = [isR600] in {
> def R600_ExportBuf : ExportBufInst {
> let Word1{20-17} = 0; // BURST_COUNT
> let Word1{21} = eop;
> - let Word1{22} = 1; // VALID_PIXEL_MODE
> + let Word1{22} = 0; // VALID_PIXEL_MODE
> let Word1{30-23} = inst;
> let Word1{31} = 1; // BARRIER
> }
> @@ -1729,7 +1729,7 @@ def LDS_USHORT_READ_RET : R600_LDS_1A <0x39, "LDS_USHORT_READ_RET",
>
> def EG_ExportSwz : ExportSwzInst {
> let Word1{19-16} = 0; // BURST_COUNT
> - let Word1{20} = 1; // VALID_PIXEL_MODE
> + let Word1{20} = 0; // VALID_PIXEL_MODE
> let Word1{21} = eop;
> let Word1{29-22} = inst;
> let Word1{30} = 0; // MARK
> @@ -1739,7 +1739,7 @@ def LDS_USHORT_READ_RET : R600_LDS_1A <0x39, "LDS_USHORT_READ_RET",
>
> def EG_ExportBuf : ExportBufInst {
> let Word1{19-16} = 0; // BURST_COUNT
> - let Word1{20} = 1; // VALID_PIXEL_MODE
> + let Word1{20} = 0; // VALID_PIXEL_MODE
> let Word1{21} = eop;
> let Word1{29-22} = inst;
> let Word1{30} = 0; // MARK
> --
> 1.8.3.1
>
> From 01810a61c5e79f4af8bc30c21f33345a98f582e9 Mon Sep 17 00:00:00 2001
> From: Vincent Lejeune <vljn at ovi.com>
> Date: Wed, 25 Sep 2013 22:13:04 +0200
> Subject: [PATCH 2/3] R600: fix swizzle export
>
> ---
> lib/Target/R600/R600ISelLowering.cpp | 14 ++--
> test/CodeGen/R600/r600-export-fix.ll | 146 +++++++++++++++++++++++++++++++++++
> test/CodeGen/R600/swizzle-export.ll | 2 +-
> 3 files changed, 156 insertions(+), 6 deletions(-)
> create mode 100644 test/CodeGen/R600/r600-export-fix.ll
>
> diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
> index 62577ea..81a28be 100644
> --- a/lib/Target/R600/R600ISelLowering.cpp
> +++ b/lib/Target/R600/R600ISelLowering.cpp
> @@ -1422,12 +1422,16 @@ static SDValue ReorganizeVector(SelectionDAG &DAG, SDValue VectorEntry,
> if (NewBldVec[i].getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
> unsigned Idx = dyn_cast<ConstantSDNode>(NewBldVec[i].getOperand(1))
> ->getZExtValue();
> - if (!isUnmovable[Idx]) {
> - // Swap i and Idx
> - std::swap(NewBldVec[Idx], NewBldVec[i]);
> - std::swap(RemapSwizzle[RemapSwizzle[Idx]], RemapSwizzle[RemapSwizzle[i]]);
> + if (i == Idx) {
> + isUnmovable[Idx] = true;
> + continue;
> }
> - isUnmovable[Idx] = true;
> + if (isUnmovable[Idx])
> + continue;
> + // Swap i and Idx
> + std::swap(NewBldVec[Idx], NewBldVec[i]);
> + std::swap(RemapSwizzle[i], RemapSwizzle[Idx]);
> + break;
> }
> }
>
> diff --git a/test/CodeGen/R600/r600-export-fix.ll b/test/CodeGen/R600/r600-export-fix.ll
> new file mode 100644
> index 0000000..78c703b
> --- /dev/null
> +++ b/test/CodeGen/R600/r600-export-fix.ll
> @@ -0,0 +1,146 @@
> +; RUN: llc < %s -march=r600 -mcpu=cedar | FileCheck %s
> +
> +;CHECK: EXPORT T{{[0-9]}}.XYZW
> +;CHECK: EXPORT T{{[0-9]}}.0000
> +;CHECK: EXPORT T{{[0-9]}}.0000
> +;CHECK: EXPORT T{{[0-9]}}.0XZW
> +;CHECK: EXPORT T{{[0-9]}}.XYZW
> +;CHECK: EXPORT T{{[0-9]}}.YX00
> +;CHECK: EXPORT T{{[0-9]}}.0000
> +;CHECK: EXPORT T{{[0-9]}}.0000
> +
> +
> +define void @main() #0 {
> +main_body:
> + %0 = call float @llvm.R600.load.input(i32 4)
> + %1 = call float @llvm.R600.load.input(i32 5)
> + %2 = call float @llvm.R600.load.input(i32 6)
> + %3 = call float @llvm.R600.load.input(i32 7)
> + %4 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
> + %5 = extractelement <4 x float> %4, i32 0
> + %6 = fmul float %5, %0
> + %7 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
> + %8 = extractelement <4 x float> %7, i32 1
> + %9 = fmul float %8, %0
> + %10 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
> + %11 = extractelement <4 x float> %10, i32 2
> + %12 = fmul float %11, %0
> + %13 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4)
> + %14 = extractelement <4 x float> %13, i32 3
> + %15 = fmul float %14, %0
> + %16 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
> + %17 = extractelement <4 x float> %16, i32 0
> + %18 = fmul float %17, %1
> + %19 = fadd float %18, %6
> + %20 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
> + %21 = extractelement <4 x float> %20, i32 1
> + %22 = fmul float %21, %1
> + %23 = fadd float %22, %9
> + %24 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
> + %25 = extractelement <4 x float> %24, i32 2
> + %26 = fmul float %25, %1
> + %27 = fadd float %26, %12
> + %28 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5)
> + %29 = extractelement <4 x float> %28, i32 3
> + %30 = fmul float %29, %1
> + %31 = fadd float %30, %15
> + %32 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
> + %33 = extractelement <4 x float> %32, i32 0
> + %34 = fmul float %33, %2
> + %35 = fadd float %34, %19
> + %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
> + %37 = extractelement <4 x float> %36, i32 1
> + %38 = fmul float %37, %2
> + %39 = fadd float %38, %23
> + %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
> + %41 = extractelement <4 x float> %40, i32 2
> + %42 = fmul float %41, %2
> + %43 = fadd float %42, %27
> + %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6)
> + %45 = extractelement <4 x float> %44, i32 3
> + %46 = fmul float %45, %2
> + %47 = fadd float %46, %31
> + %48 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
> + %49 = extractelement <4 x float> %48, i32 0
> + %50 = fmul float %49, %3
> + %51 = fadd float %50, %35
> + %52 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
> + %53 = extractelement <4 x float> %52, i32 1
> + %54 = fmul float %53, %3
> + %55 = fadd float %54, %39
> + %56 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
> + %57 = extractelement <4 x float> %56, i32 2
> + %58 = fmul float %57, %3
> + %59 = fadd float %58, %43
> + %60 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7)
> + %61 = extractelement <4 x float> %60, i32 3
> + %62 = fmul float %61, %3
> + %63 = fadd float %62, %47
> + %64 = load <4 x float> addrspace(8)* null
> + %65 = extractelement <4 x float> %64, i32 0
> + %66 = load <4 x float> addrspace(8)* null
> + %67 = extractelement <4 x float> %66, i32 1
> + %68 = load <4 x float> addrspace(8)* null
> + %69 = extractelement <4 x float> %68, i32 2
> + %70 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
> + %71 = extractelement <4 x float> %70, i32 0
> + %72 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
> + %73 = extractelement <4 x float> %72, i32 1
> + %74 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
> + %75 = extractelement <4 x float> %74, i32 2
> + %76 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
> + %77 = extractelement <4 x float> %76, i32 0
> + %78 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
> + %79 = extractelement <4 x float> %78, i32 1
> + %80 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3)
> + %81 = extractelement <4 x float> %80, i32 2
> + %82 = insertelement <4 x float> undef, float %51, i32 0
> + %83 = insertelement <4 x float> %82, float %55, i32 1
> + %84 = insertelement <4 x float> %83, float %59, i32 2
> + %85 = insertelement <4 x float> %84, float %63, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %85, i32 60, i32 1)
> + %86 = insertelement <4 x float> undef, float 0.000000e+00, i32 0
> + %87 = insertelement <4 x float> %86, float 0.000000e+00, i32 1
> + %88 = insertelement <4 x float> %87, float 0.000000e+00, i32 2
> + %89 = insertelement <4 x float> %88, float 0.000000e+00, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %89, i32 0, i32 2)
> + %90 = insertelement <4 x float> undef, float 0.000000e+00, i32 0
> + %91 = insertelement <4 x float> %90, float 0.000000e+00, i32 1
> + %92 = insertelement <4 x float> %91, float 0.000000e+00, i32 2
> + %93 = insertelement <4 x float> %92, float 0.000000e+00, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %93, i32 1, i32 2)
> + %94 = insertelement <4 x float> undef, float 0.000000e+00, i32 0
> + %95 = insertelement <4 x float> %94, float %65, i32 1
> + %96 = insertelement <4 x float> %95, float %67, i32 2
> + %97 = insertelement <4 x float> %96, float %69, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %97, i32 2, i32 2)
> + %98 = insertelement <4 x float> undef, float %77, i32 0
> + %99 = insertelement <4 x float> %98, float %79, i32 1
> + %100 = insertelement <4 x float> %99, float %81, i32 2
> + %101 = insertelement <4 x float> %100, float %71, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %101, i32 3, i32 2)
> + %102 = insertelement <4 x float> undef, float %73, i32 0
> + %103 = insertelement <4 x float> %102, float %75, i32 1
> + %104 = insertelement <4 x float> %103, float 0.000000e+00, i32 2
> + %105 = insertelement <4 x float> %104, float 0.000000e+00, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %105, i32 4, i32 2)
> + %106 = insertelement <4 x float> undef, float 0.000000e+00, i32 0
> + %107 = insertelement <4 x float> %106, float 0.000000e+00, i32 1
> + %108 = insertelement <4 x float> %107, float 0.000000e+00, i32 2
> + %109 = insertelement <4 x float> %108, float 0.000000e+00, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %109, i32 5, i32 2)
> + %110 = insertelement <4 x float> undef, float 0.000000e+00, i32 0
> + %111 = insertelement <4 x float> %110, float 0.000000e+00, i32 1
> + %112 = insertelement <4 x float> %111, float 0.000000e+00, i32 2
> + %113 = insertelement <4 x float> %112, float 0.000000e+00, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %113, i32 6, i32 2)
> + ret void
> +}
> +
> +; Function Attrs: readnone
> +declare float @llvm.R600.load.input(i32) #1
> +
> +declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
> +
> +attributes #0 = { "ShaderType"="1" }
> +attributes #1 = { readnone }
> diff --git a/test/CodeGen/R600/swizzle-export.ll b/test/CodeGen/R600/swizzle-export.ll
> index b2175af..02fe13a 100644
> --- a/test/CodeGen/R600/swizzle-export.ll
> +++ b/test/CodeGen/R600/swizzle-export.ll
> @@ -93,7 +93,7 @@ main_body:
> }
>
> ; EG-CHECK: @main2
> -; EG-CHECK: T{{[0-9]+}}.ZXY0
> +; EG-CHECK: T{{[0-9]+}}.YXZ0
>
> define void @main2() #0 {
> main_body:
> --
> 1.8.3.1
>
> From ffe42f11b689cdc61f43082df95a24e9e9911646 Mon Sep 17 00:00:00 2001
> From: Vincent Lejeune <vljn at ovi.com>
> Date: Fri, 6 Sep 2013 00:25:48 +0200
> Subject: [PATCH 3/3] R600: Use masked read sel for texture instructions
>
> ---
> lib/Target/R600/R600ISelLowering.cpp | 5 +++++
> test/CodeGen/R600/swizzle-export.ll | 15 +++++++--------
> 2 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
> index 81a28be..3c2e388 100644
> --- a/lib/Target/R600/R600ISelLowering.cpp
> +++ b/lib/Target/R600/R600ISelLowering.cpp
> @@ -1379,6 +1379,11 @@ CompactSwizzlableVector(SelectionDAG &DAG, SDValue VectorEntry,
> };
>
> for (unsigned i = 0; i < 4; i++) {
> + if (NewBldVec[i].getOpcode() == ISD::UNDEF)
> + // We mask write here to teach later passes that the ith element of this
> + // vector is undef. Thus we can use it to reduce 128 bits reg usage,
> + // break false dependencies and additionnaly make assembly easier to read.
> + RemapSwizzle[i] = 7; // SEL_MASK_WRITE
> if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(NewBldVec[i])) {
> if (C->isZero()) {
> RemapSwizzle[i] = 4; // SEL_0
> diff --git a/test/CodeGen/R600/swizzle-export.ll b/test/CodeGen/R600/swizzle-export.ll
> index 02fe13a..9a58f66 100644
> --- a/test/CodeGen/R600/swizzle-export.ll
> +++ b/test/CodeGen/R600/swizzle-export.ll
> @@ -93,6 +93,7 @@ main_body:
> }
>
> ; EG-CHECK: @main2
> +; EG-CHECK: T{{[0-9]+}}.XY__
> ; EG-CHECK: T{{[0-9]+}}.YXZ0
>
> define void @main2() #0 {
> @@ -110,14 +111,12 @@ main_body:
> %10 = extractelement <4 x float> %9, i32 1
> %11 = insertelement <4 x float> undef, float %0, i32 0
> %12 = insertelement <4 x float> %11, float %1, i32 1
> - %13 = insertelement <4 x float> %12, float %2, i32 2
> - %14 = insertelement <4 x float> %13, float %3, i32 3
> - call void @llvm.R600.store.swizzle(<4 x float> %14, i32 60, i32 1)
> - %15 = insertelement <4 x float> undef, float %6, i32 0
> - %16 = insertelement <4 x float> %15, float %8, i32 1
> - %17 = insertelement <4 x float> %16, float %10, i32 2
> - %18 = insertelement <4 x float> %17, float 0.000000e+00, i32 3
> - call void @llvm.R600.store.swizzle(<4 x float> %18, i32 0, i32 2)
> + call void @llvm.R600.store.swizzle(<4 x float> %12, i32 60, i32 1)
> + %13 = insertelement <4 x float> undef, float %6, i32 0
> + %14 = insertelement <4 x float> %13, float %8, i32 1
> + %15 = insertelement <4 x float> %14, float %10, i32 2
> + %16 = insertelement <4 x float> %15, float 0.000000e+00, i32 3
> + call void @llvm.R600.store.swizzle(<4 x float> %16, i32 0, i32 2)
> ret void
> }
>
> --
> 1.8.3.1
>
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