[llvm] r192039 - Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
Craig Topper
craig.topper at gmail.com
Sat Oct 5 12:23:00 PDT 2013
Author: ctopper
Date: Sat Oct 5 14:22:59 2013
New Revision: 192039
URL: http://llvm.org/viewvc/llvm-project?rev=192039&view=rev
Log:
Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
Modified:
llvm/trunk/include/llvm/IR/IntrinsicsX86.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=192039&r1=192038&r2=192039&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Sat Oct 5 14:22:59 2013
@@ -2598,65 +2598,9 @@ let TargetPrefix = "x86" in { // All in
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_tbm_bextri_u32 : GCCBuiltin<"__builtin_ia32_bextri_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty,
- llvm_i32_ty], [IntrNoMem]>;
+ Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_x86_tbm_bextri_u64 : GCCBuiltin<"__builtin_ia32_bextri_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty,
- llvm_i64_ty], [IntrNoMem]>;
- def int_x86_tbm_blcfill_u32 : GCCBuiltin<"__builtin_ia32_blcfill_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blcfill_u64 : GCCBuiltin<"__builtin_ia32_blcfill_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blci_u32 : GCCBuiltin<"__builtin_ia32_blci_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blci_u64 : GCCBuiltin<"__builtin_ia32_blci_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blcic_u32 : GCCBuiltin<"__builtin_ia32_blcic_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blcic_u64 : GCCBuiltin<"__builtin_ia32_blcic_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blcmsk_u32 : GCCBuiltin<"__builtin_ia32_blcmsk_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blcmsk_u64 : GCCBuiltin<"__builtin_ia32_blcmsk_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blcs_u32 : GCCBuiltin<"__builtin_ia32_blcs_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blcs_u64 : GCCBuiltin<"__builtin_ia32_blcs_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blsfill_u32 : GCCBuiltin<"__builtin_ia32_blsfill_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blsfill_u64 : GCCBuiltin<"__builtin_ia32_blsfill_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blsic_u32 : GCCBuiltin<"__builtin_ia32_blsic_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_blsic_u64 : GCCBuiltin<"__builtin_ia32_blsic_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_t1mskc_u32 : GCCBuiltin<"__builtin_ia32_t1mskc_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_t1mskc_u64 : GCCBuiltin<"__builtin_ia32_t1mskc_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
- def int_x86_tbm_tzmsk_u32 : GCCBuiltin<"__builtin_ia32_tzmsk_u32">,
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
- [IntrNoMem]>;
- def int_x86_tbm_tzmsk_u64 : GCCBuiltin<"__builtin_ia32_tzmsk_u64">,
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty],
- [IntrNoMem]>;
+ Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
}
//===----------------------------------------------------------------------===//
@@ -2967,4 +2911,4 @@ let TargetPrefix = "x86" in {
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
def int_x86_sha256msg2 : GCCBuiltin<"__builtin_ia32_sha256msg2">,
Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
-}
\ No newline at end of file
+}
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=192039&r1=192038&r2=192039&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Sat Oct 5 14:22:59 2013
@@ -1939,54 +1939,35 @@ defm BEXTRI64 : tbm_ternary_imm_intr<0x1
multiclass tbm_binary_rm<bits<8> opc, Format FormReg, Format FormMem,
RegisterClass RC, string OpcodeStr,
- X86MemOperand x86memop, PatFrag ld_frag,
- Intrinsic Int> {
+ X86MemOperand x86memop, PatFrag ld_frag> {
+let hasSideEffects = 0 in {
def rr : I<opc, FormReg, (outs RC:$dst), (ins RC:$src),
!strconcat(OpcodeStr,"\t{$src, $dst|$dst, $src}"),
- [(set RC:$dst, (Int RC:$src))]>,
- XOP, XOP9, VEX_4V;
+ []>, XOP, XOP9, VEX_4V;
+ let mayLoad = 1 in
def rm : I<opc, FormMem, (outs RC:$dst), (ins x86memop:$src),
!strconcat(OpcodeStr,"\t{$src, $dst|$dst, $src}"),
- [(set RC:$dst, (Int (ld_frag addr:$src)))]>,
- XOP, XOP9, VEX_4V;
+ []>, XOP, XOP9, VEX_4V;
+}
}
multiclass tbm_binary_intr<bits<8> opc, string OpcodeStr,
- Format FormReg, Format FormMem,
- Intrinsic Int32, Intrinsic Int64> {
+ Format FormReg, Format FormMem> {
defm _32 : tbm_binary_rm<opc, FormReg, FormMem, GR32, OpcodeStr, i32mem,
- loadi32, Int32>;
+ loadi32>;
defm _64 : tbm_binary_rm<opc, FormReg, FormMem, GR64, OpcodeStr, i64mem,
- loadi64, Int64>, VEX_W;
+ loadi64>, VEX_W;
}
-defm BLCFILL : tbm_binary_intr<0x01, "blcfill", MRM1r, MRM1m,
- int_x86_tbm_blcfill_u32,
- int_x86_tbm_blcfill_u64>;
-defm BLCI : tbm_binary_intr<0x02, "blci", MRM6r, MRM6m,
- int_x86_tbm_blci_u32,
- int_x86_tbm_blci_u64>;
-defm BLCIC : tbm_binary_intr<0x01, "blcic", MRM5r, MRM5m,
- int_x86_tbm_blcic_u32,
- int_x86_tbm_blcic_u64>;
-defm BLCMSK : tbm_binary_intr<0x02, "blcmsk", MRM1r, MRM1m,
- int_x86_tbm_blcmsk_u32,
- int_x86_tbm_blcmsk_u64>;
-defm BLCS : tbm_binary_intr<0x01, "blcs", MRM3r, MRM3m,
- int_x86_tbm_blcs_u32,
- int_x86_tbm_blcs_u64>;
-defm BLSFILL : tbm_binary_intr<0x01, "blsfill", MRM2r, MRM2m,
- int_x86_tbm_blsfill_u32,
- int_x86_tbm_blsfill_u64>;
-defm BLSIC : tbm_binary_intr<0x01, "blsic", MRM6r, MRM6m,
- int_x86_tbm_blsic_u32,
- int_x86_tbm_blsic_u64>;
-defm T1MSKC : tbm_binary_intr<0x01, "t1mskc", MRM7r, MRM7m,
- int_x86_tbm_t1mskc_u32,
- int_x86_tbm_t1mskc_u64>;
-defm TZMSK : tbm_binary_intr<0x01, "tzmsk", MRM4r, MRM4m,
- int_x86_tbm_tzmsk_u32,
- int_x86_tbm_tzmsk_u64>;
+defm BLCFILL : tbm_binary_intr<0x01, "blcfill", MRM1r, MRM1m>;
+defm BLCI : tbm_binary_intr<0x02, "blci", MRM6r, MRM6m>;
+defm BLCIC : tbm_binary_intr<0x01, "blcic", MRM5r, MRM5m>;
+defm BLCMSK : tbm_binary_intr<0x02, "blcmsk", MRM1r, MRM1m>;
+defm BLCS : tbm_binary_intr<0x01, "blcs", MRM3r, MRM3m>;
+defm BLSFILL : tbm_binary_intr<0x01, "blsfill", MRM2r, MRM2m>;
+defm BLSIC : tbm_binary_intr<0x01, "blsic", MRM6r, MRM6m>;
+defm T1MSKC : tbm_binary_intr<0x01, "t1mskc", MRM7r, MRM7m>;
+defm TZMSK : tbm_binary_intr<0x01, "tzmsk", MRM4r, MRM4m>;
} // HasTBM, EFLAGS
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll?rev=192039&r1=192038&r2=192039&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll Sat Oct 5 14:22:59 2013
@@ -41,382 +41,3 @@ entry:
%0 = tail call i64 @llvm.x86.tbm.bextri.u64(i64 %tmp1, i64 2814)
ret i64 %0
}
-
-define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcfill_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcfill %
- %0 = tail call i32 @llvm.x86.tbm.blcfill.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.blcfill.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_blcfill_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcfill_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: blcfill (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.blcfill.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcfill_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcfill %
- %0 = tail call i64 @llvm.x86.tbm.blcfill.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.blcfill.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_blcfill_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcfill_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: blcfill (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.blcfill.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blci_u32:
- ; CHECK-NOT: mov
- ; CHECK: blci %
- %0 = tail call i32 @llvm.x86.tbm.blci.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.blci.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_blci_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blci_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: blci (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.blci.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blci_u64:
- ; CHECK-NOT: mov
- ; CHECK: blci %
- %0 = tail call i64 @llvm.x86.tbm.blci.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.blci.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_blci_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEl: test_x86_tbm_blci_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: blci (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.blci.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcic_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcic %
- %0 = tail call i32 @llvm.x86.tbm.blcic.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.blcic.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_blcic_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcic_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: blcic (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.blcic.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcic_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcic %
- %0 = tail call i64 @llvm.x86.tbm.blcic.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.blcic.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_blcic_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcic_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: blcic (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.blcic.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcmsk %
- %0 = tail call i32 @llvm.x86.tbm.blcmsk.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.blcmsk.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_blcmsk_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcmsk_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: blcmsk (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.blcmsk.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcmsk %
- %0 = tail call i64 @llvm.x86.tbm.blcmsk.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.blcmsk.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_blcmsk_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcmsk_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: blcmsk (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.blcmsk.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcs_u32:
- ; CHECK-NOT: mov
- ; CHECK: blcs %
- %0 = tail call i32 @llvm.x86.tbm.blcs.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.blcs.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_blcs_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcs_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: blcs (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.blcs.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcs_u64:
- ; CHECK-NOT: mov
- ; CHECK: blcs %
- %0 = tail call i64 @llvm.x86.tbm.blcs.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.blcs.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_blcs_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blcs_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: blcs (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.blcs.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsfill_u32:
- ; CHECK-NOT: mov
- ; CHECK: blsfill %
- %0 = tail call i32 @llvm.x86.tbm.blsfill.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.blsfill.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_blsfill_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsfill_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: blsfill (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.blsfill.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsfill_u64:
- ; CHECK-NOT: mov
- ; CHECK: blsfill %
- %0 = tail call i64 @llvm.x86.tbm.blsfill.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.blsfill.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_blsfill_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsfill_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: blsfill (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.blsfill.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsic_u32:
- ; CHECK-NOT: mov
- ; CHECK: blsic %
- %0 = tail call i32 @llvm.x86.tbm.blsic.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.blsic.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_blsic_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsic_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: blsic (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.blsic.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsic_u64:
- ; CHECK-NOT: mov
- ; CHECK: blsic %
- %0 = tail call i64 @llvm.x86.tbm.blsic.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.blsic.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_blsic_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_blsic_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: blsic (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.blsic.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
- ; CHECK-NOT: mov
- ; CHECK: t1mskc %
- %0 = tail call i32 @llvm.x86.tbm.t1mskc.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.t1mskc.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_t1mskc_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_t1mskc_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: t1mskc (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.t1mskc.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_t1mskc_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
- ; CHECK-NOT: mov
- ; CHECK: t1mskc %
- %0 = tail call i64 @llvm.x86.tbm.t1mskc.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.t1mskc.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_t1mskc_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_t1mskc_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: t1mskc (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.t1mskc.u64(i64 %tmp1)
- ret i64 %0
-}
-
-define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
- ; CHECK-NOT: mov
- ; CHECK: tzmsk %
- %0 = tail call i32 @llvm.x86.tbm.tzmsk.u32(i32 %a)
- ret i32 %0
-}
-
-declare i32 @llvm.x86.tbm.tzmsk.u32(i32) nounwind readnone
-
-define i32 @test_x86_tbm_tzmsk_u32_m(i32* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEL: test_x86_tbm_tzmsk_u32_m:
- ; CHECK-NOT: mov
- ; CHECK: tzmsk (%
- %tmp1 = load i32* %a, align 4
- %0 = tail call i32 @llvm.x86.tbm.tzmsk.u32(i32 %tmp1)
- ret i32 %0
-}
-
-define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind readnone {
-entry:
- ; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
- ; CHECK-NOT: mov
- ; CHECK: tzmsk %
- %0 = tail call i64 @llvm.x86.tbm.tzmsk.u64(i64 %a)
- ret i64 %0
-}
-
-declare i64 @llvm.x86.tbm.tzmsk.u64(i64) nounwind readnone
-
-define i64 @test_x86_tbm_tzmsk_u64_m(i64* nocapture %a) nounwind readonly {
-entry:
- ; CHECK-LABEl: test_x86_tbm_tzmsk_u64_m:
- ; CHECK-NOT: mov
- ; CHECK: tzmsk (%
- %tmp1 = load i64* %a, align 8
- %0 = tail call i64 @llvm.x86.tbm.tzmsk.u64(i64 %tmp1)
- ret i64 %0
-}
-
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