[llvm] r191767 - [SystemZ] Extend pseudo conditional 8- and 16-bit stores to high words
Richard Sandiford
rsandifo at linux.vnet.ibm.com
Tue Oct 1 07:33:55 PDT 2013
Author: rsandifo
Date: Tue Oct 1 09:33:55 2013
New Revision: 191767
URL: http://llvm.org/viewvc/llvm-project?rev=191767&view=rev
Log:
[SystemZ] Extend pseudo conditional 8- and 16-bit stores to high words
As the comment says, we always want to use STOC for 32-bit stores.
Modified:
llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=191767&r1=191766&r2=191767&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Tue Oct 1 09:33:55 2013
@@ -2893,6 +2893,14 @@ EmitInstrWithCustomInserter(MachineInstr
case SystemZ::SelectF128:
return emitSelect(MI, MBB);
+ case SystemZ::CondStore8Mux:
+ return emitCondStore(MI, MBB, SystemZ::STCMux, 0, false);
+ case SystemZ::CondStore8MuxInv:
+ return emitCondStore(MI, MBB, SystemZ::STCMux, 0, true);
+ case SystemZ::CondStore16Mux:
+ return emitCondStore(MI, MBB, SystemZ::STHMux, 0, false);
+ case SystemZ::CondStore16MuxInv:
+ return emitCondStore(MI, MBB, SystemZ::STHMux, 0, true);
case SystemZ::CondStore8:
return emitCondStore(MI, MBB, SystemZ::STC, 0, false);
case SystemZ::CondStore8Inv:
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=191767&r1=191766&r2=191767&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Tue Oct 1 09:33:55 2013
@@ -202,12 +202,20 @@ def Select32Mux : SelectWrapper<GRX32>,
def Select32 : SelectWrapper<GR32>;
def Select64 : SelectWrapper<GR64>;
-defm CondStore8 : CondStores<GR32, nonvolatile_truncstorei8,
- nonvolatile_anyextloadi8, bdxaddr20only>;
-defm CondStore16 : CondStores<GR32, nonvolatile_truncstorei16,
- nonvolatile_anyextloadi16, bdxaddr20only>;
-defm CondStore32 : CondStores<GR32, nonvolatile_store,
- nonvolatile_load, bdxaddr20only>;
+// We don't define 32-bit Mux stores because the low-only STOC should
+// always be used if possible.
+defm CondStore8Mux : CondStores<GRX32, nonvolatile_truncstorei8,
+ nonvolatile_anyextloadi8, bdxaddr20only>,
+ Requires<[FeatureHighWord]>;
+defm CondStore16Mux : CondStores<GRX32, nonvolatile_truncstorei16,
+ nonvolatile_anyextloadi16, bdxaddr20only>,
+ Requires<[FeatureHighWord]>;
+defm CondStore8 : CondStores<GR32, nonvolatile_truncstorei8,
+ nonvolatile_anyextloadi8, bdxaddr20only>;
+defm CondStore16 : CondStores<GR32, nonvolatile_truncstorei16,
+ nonvolatile_anyextloadi16, bdxaddr20only>;
+defm CondStore32 : CondStores<GR32, nonvolatile_store,
+ nonvolatile_load, bdxaddr20only>;
defm : CondStores64<CondStore8, CondStore8Inv, nonvolatile_truncstorei8,
nonvolatile_anyextloadi8, bdxaddr20only>;
Modified: llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll?rev=191767&r1=191766&r2=191767&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll (original)
+++ llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll Tue Oct 1 09:33:55 2013
@@ -28,3 +28,35 @@ define void @f2(float %val, i8 *%ptr) {
store i8 %trunc, i8 *%ptr
ret void
}
+
+; Like f2, but with a conditional store.
+define void @f3(float %val, i8 *%ptr, i32 %which) {
+; CHECK-LABEL: f3:
+; CHECK: cijlh %r3, 0,
+; CHECK: lgdr [[REG:%r[0-5]]], %f0
+; CHECK: stch [[REG]], 0(%r2)
+; CHECK: br %r14
+ %int = bitcast float %val to i32
+ %trunc = trunc i32 %int to i8
+ %old = load i8 *%ptr
+ %cmp = icmp eq i32 %which, 0
+ %res = select i1 %cmp, i8 %trunc, i8 %old
+ store i8 %res, i8 *%ptr
+ ret void
+}
+
+; ...and again with 16-bit memory.
+define void @f4(float %val, i16 *%ptr, i32 %which) {
+; CHECK-LABEL: f4:
+; CHECK: cijlh %r3, 0,
+; CHECK: lgdr [[REG:%r[0-5]]], %f0
+; CHECK: sthh [[REG]], 0(%r2)
+; CHECK: br %r14
+ %int = bitcast float %val to i32
+ %trunc = trunc i32 %int to i16
+ %old = load i16 *%ptr
+ %cmp = icmp eq i32 %which, 0
+ %res = select i1 %cmp, i16 %trunc, i16 %old
+ store i16 %res, i16 *%ptr
+ ret void
+}
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