[llvm] r191738 - [SystemZ] Reapply: Add definitions of LFH and STFH
Richard Sandiford
rsandifo at linux.vnet.ibm.com
Tue Oct 1 03:31:04 PDT 2013
Author: rsandifo
Date: Tue Oct 1 05:31:04 2013
New Revision: 191738
URL: http://llvm.org/viewvc/llvm-project?rev=191738&view=rev
Log:
[SystemZ] Reapply: Add definitions of LFH and STFH
Originally committed as r191661, but reverted because it changed the matching
order of comparisons on some hosts. That should have been fixed by r191735.
Modified:
llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
llvm/trunk/test/MC/SystemZ/insn-bad-z196.s
llvm/trunk/test/MC/SystemZ/insn-bad.s
llvm/trunk/test/MC/SystemZ/insn-good-z196.s
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=191738&r1=191737&r2=191738&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Tue Oct 1 05:31:04 2013
@@ -294,6 +294,8 @@ let neverHasSideEffects = 1, isAsCheapAs
// Register loads.
let canFoldAsLoad = 1, SimpleBDXLoad = 1 in {
defm L : UnaryRXPair<"l", 0x58, 0xE358, load, GR32, 4>;
+ def LFH : UnaryRXY<"lfh", 0xE3CA, load, GRH32, 4>,
+ Requires<[FeatureHighWord]>;
def LG : UnaryRXY<"lg", 0xE304, load, GR64, 8>;
// These instructions are split after register allocation, so we don't
@@ -326,6 +328,8 @@ let Uses = [CC] in {
// Register stores.
let SimpleBDXStore = 1 in {
defm ST : StoreRXPair<"st", 0x50, 0xE350, store, GR32, 4>;
+ def STFH : StoreRXY<"stfh", 0xE3CB, store, GRH32, 4>,
+ Requires<[FeatureHighWord]>;
def STG : StoreRXY<"stg", 0xE324, store, GR64, 8>;
// These instructions are split after register allocation, so we don't
Modified: llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt?rev=191738&r1=191737&r2=191738&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt (original)
+++ llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt Tue Oct 1 05:31:04 2013
@@ -2749,6 +2749,36 @@
# CHECK: ley %f15, 0
0xed 0xf0 0x00 0x00 0x00 0x64
+# CHECK: lfh %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0xca
+
+# CHECK: lfh %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0xca
+
+# CHECK: lfh %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0xca
+
+# CHECK: lfh %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0xca
+
+# CHECK: lfh %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0xca
+
+# CHECK: lfh %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0xca
+
+# CHECK: lfh %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0xca
+
+# CHECK: lfh %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0xca
+
+# CHECK: lfh %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0xca
+
+# CHECK: lfh %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0xca
+
# CHECK: lgbr %r0, %r15
0xb9 0x06 0x00 0x0f
@@ -6697,6 +6727,36 @@
# CHECK: sth %r15, 0
0x40 0xf0 0x00 0x00
+# CHECK: stfh %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0xcb
+
+# CHECK: stfh %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0xcb
+
+# CHECK: stfh %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0xcb
+
+# CHECK: stfh %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0xcb
+
+# CHECK: stfh %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0xcb
+
+# CHECK: stfh %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0xcb
+
+# CHECK: stfh %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0xcb
+
+# CHECK: stfh %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0xcb
+
+# CHECK: stfh %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0xcb
+
+# CHECK: stfh %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0xcb
+
# CHECK: sthy %r0, -524288
0xe3 0x00 0x00 0x00 0x80 0x70
Modified: llvm/trunk/test/MC/SystemZ/insn-bad-z196.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-bad-z196.s?rev=191738&r1=191737&r2=191738&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-bad-z196.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-bad-z196.s Tue Oct 1 05:31:04 2013
@@ -73,6 +73,14 @@
fixbra %f2, 0, %f0, 0
#CHECK: error: invalid operand
+#CHECK: lfh %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lfh %r0, 524288
+
+ lfh %r0, -524289
+ lfh %r0, 524288
+
+#CHECK: error: invalid operand
#CHECK: loc %r0,0,-1
#CHECK: error: invalid operand
#CHECK: loc %r0,0,16
@@ -205,6 +213,14 @@
srlk %r0,%r0,0(%r1,%r2)
#CHECK: error: invalid operand
+#CHECK: stfh %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: stfh %r0, 524288
+
+ stfh %r0, -524289
+ stfh %r0, 524288
+
+#CHECK: error: invalid operand
#CHECK: stoc %r0,0,-1
#CHECK: error: invalid operand
#CHECK: stoc %r0,0,16
Modified: llvm/trunk/test/MC/SystemZ/insn-bad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-bad.s?rev=191738&r1=191737&r2=191738&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-bad.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-bad.s Tue Oct 1 05:31:04 2013
@@ -1454,6 +1454,11 @@
ley %f0, -524289
ley %f0, 524288
+#CHECK: error: {{(instruction requires: high-word)?}}
+#CHECK: lfh %r0, 0
+
+ lfh %r0, 0
+
#CHECK: error: invalid operand
#CHECK: lg %r0, -524289
#CHECK: error: invalid operand
@@ -2982,6 +2987,11 @@
sthy %r0, -524289
sthy %r0, 524288
+#CHECK: error: {{(instruction requires: high-word)?}}
+#CHECK: stfh %r0, 0
+
+ stfh %r0, 0
+
#CHECK: error: invalid operand
#CHECK: stmg %r0, %r0, -524289
#CHECK: error: invalid operand
Modified: llvm/trunk/test/MC/SystemZ/insn-good-z196.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-good-z196.s?rev=191738&r1=191737&r2=191738&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-good-z196.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-good-z196.s Tue Oct 1 05:31:04 2013
@@ -163,6 +163,28 @@
fixbra %f4, 5, %f8, 9
fixbra %f13, 0, %f0, 0
+#CHECK: lfh %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0xca]
+#CHECK: lfh %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xca]
+#CHECK: lfh %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0xca]
+#CHECK: lfh %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0xca]
+#CHECK: lfh %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0xca]
+#CHECK: lfh %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0xca]
+#CHECK: lfh %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0xca]
+#CHECK: lfh %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0xca]
+#CHECK: lfh %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0xca]
+#CHECK: lfh %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0xca]
+
+ lfh %r0, -524288
+ lfh %r0, -1
+ lfh %r0, 0
+ lfh %r0, 1
+ lfh %r0, 524287
+ lfh %r0, 0(%r1)
+ lfh %r0, 0(%r15)
+ lfh %r0, 524287(%r1,%r15)
+ lfh %r0, 524287(%r15,%r1)
+ lfh %r15, 0
+
#CHECK: loc %r0, 0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf2]
#CHECK: loc %r0, 0, 15 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf2]
#CHECK: loc %r0, -524288, 0 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf2]
@@ -537,6 +559,28 @@
srlk %r0,%r0,524287(%r1)
srlk %r0,%r0,524287(%r15)
+#CHECK: stfh %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0xcb]
+#CHECK: stfh %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xcb]
+#CHECK: stfh %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0xcb]
+#CHECK: stfh %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0xcb]
+#CHECK: stfh %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0xcb]
+#CHECK: stfh %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0xcb]
+#CHECK: stfh %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0xcb]
+#CHECK: stfh %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0xcb]
+#CHECK: stfh %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0xcb]
+#CHECK: stfh %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0xcb]
+
+ stfh %r0, -524288
+ stfh %r0, -1
+ stfh %r0, 0
+ stfh %r0, 1
+ stfh %r0, 524287
+ stfh %r0, 0(%r1)
+ stfh %r0, 0(%r15)
+ stfh %r0, 524287(%r1,%r15)
+ stfh %r0, 524287(%r15,%r1)
+ stfh %r15, 0
+
#CHECK: stoc %r0, 0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf3]
#CHECK: stoc %r0, 0, 15 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf3]
#CHECK: stoc %r0, -524288, 0 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf3]
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