[llvm] r191426 - PPC: Allow partial fills in writeNopData()

[David Majnemer]

This isn't used for code, it's used for data.  It's not so much a nop so
much as it is padding.

For additional reassurance, the ARM backend works in a very similar way:
ARMAsmBackend::writeNopData() for 'thumb' mode will use thumb nops and
follow it up with a zero.
ARMAsmBackend::writeNopData() for 'arm' mode will use arm nops and follow
it up with some % 4 number of bytes.

N.B.  I see no rationale for why the ARMAsmBackend::writeNopData() will
emit 0x00 0x00 0xa0 when faced with three padding bytes...


On Mon, Sep 30, 2013 at 3:07 PM, Eli Friedman <eli.friedman at gmail.com>wrote:

> On Thu, Sep 26, 2013 at 2:18 AM, David Majnemer <david.majnemer at gmail.com>wrote:
>
>> Author: majnemer
>> Date: Thu Sep 26 04:18:48 2013
>> New Revision: 191426
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=191426&view=rev
>> Log:
>> PPC: Allow partial fills in writeNopData()
>>
>> When asked to pad an irregular number of bytes, we should fill with
>> zeros.  This is consistent with the behavior specified in the AIX
>> Assembler Language Reference as well as other LLVM and binutils
>> assemblers.
>>
>> N.B. There is a small deviation from binutils' PPC assembler:
>> when handling pads which are greater than 4 bytes but not mod 4,
>> binutils will not emit any NOP sequences at all and only use zeros.
>> This may or may not be a bug but there is no excellent rationale as to
>> why that behavior is important to emulate.  If that behavior is needed,
>> we can change writeNopData() to behave in the same way.
>>
>> This fixes PR17352.
>>
>> Modified:
>>     llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
>>     llvm/trunk/test/MC/PowerPC/ppc-nop.s
>>
>> Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp?rev=191426&r1=191425&r2=191426&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
>> (original)
>> +++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp Thu Sep
>> 26 04:18:48 2013
>> @@ -132,14 +132,17 @@ public:
>>    }
>>
>>    bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
>> -    // Can't emit NOP with size not multiple of 32-bits
>> -    if (Count % 4 != 0)
>> -      return false;
>> -
>>      uint64_t NumNops = Count / 4;
>>      for (uint64_t i = 0; i != NumNops; ++i)
>>        OW->Write32(0x60000000);
>>
>> +    switch (Count % 4) {
>> +    default: break; // No leftover bytes to write
>> +    case 1: OW->Write8(0); break;
>> +    case 2: OW->Write16(0); break;
>> +    case 3: OW->Write16(0); OW->Write8(0); break;
>> +    }
>>
>>
> This is probably a silly question, but are you sure the switch is supposed
> to be after the loop?  It looks like you're emitting misaligned nops.
>
> -Eli
>
>
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