[llvm] r191122 - LoopVectorizer: Only allow vectorization of intrinsics. We can't know for sure that the functions 'abs' or 'round' are the functions from libm.

Benjamin Kramer benny.kra at gmail.com
Sat Sep 21 03:25:46 PDT 2013


On 21.09.2013, at 02:27, Nadav Rotem <nrotem at apple.com> wrote:

> Author: nadav
> Date: Fri Sep 20 19:27:05 2013
> New Revision: 191122
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=191122&view=rev
> Log:
> LoopVectorizer: Only allow vectorization of intrinsics. We can't know for sure that the functions 'abs' or 'round' are the functions from libm.
> 
> rdar://15012650

I can't view the bug report, but this commit is wrong. We can make assumptions on the functions when TLI says they're available, in fact we will inline many of them in the backend or perform other optimizations on them. If the user wants to tell the compiler to disavow its knowledge of C functions they have to pass -fno-builtin to Clang.

Please revert.

- Ben

> 
> Modified:
>    llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp
>    llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll
> 
> Modified: llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp?rev=191122&r1=191121&r2=191122&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp (original)
> +++ llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp Fri Sep 20 19:27:05 2013
> @@ -2925,9 +2925,18 @@ bool LoopVectorizationLegality::canVecto
>       // We still don't handle functions. However, we can ignore dbg intrinsic
>       // calls and we do handle certain intrinsic and libm functions.
>       CallInst *CI = dyn_cast<CallInst>(it);
> -      if (CI && !getIntrinsicIDForCall(CI, TLI) && !isa<DbgInfoIntrinsic>(CI)) {
> +      if (CI) {
>         DEBUG(dbgs() << "LV: Found a call site.\n");
> -        return false;
> +
> +        if (!isa<IntrinsicInst>(it)) {
> +          DEBUG(dbgs() << "LV: We only vectorize intrinsics.\n");
> +          return false;
> +        }
> +
> +        if (!getIntrinsicIDForCall(CI, TLI) && !isa<DbgInfoIntrinsic>(CI)) {
> +          DEBUG(dbgs() << "LV: Found an unknown intrinsic.\n");
> +          return false;
> +        }
>       }
> 
>       // Check that the instruction return type is vectorizable.
> 
> Modified: llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll?rev=191122&r1=191121&r2=191122&view=diff
> ==============================================================================
> --- llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll (original)
> +++ llvm/trunk/test/Transforms/LoopVectorize/intrinsic.ll Fri Sep 20 19:27:05 2013
> @@ -1018,7 +1018,7 @@ for.body:
>   %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
>   %arrayidx = getelementptr inbounds float* %x, i64 %indvars.iv
>   %0 = load float* %arrayidx, align 4
> -  %call = tail call float @fabsf(float %0) nounwind readnone
> +  %call = tail call float @llvm.fabs.f32(float %0) nounwind readnone
>   store float %call, float* %arrayidx, align 4
>   %indvars.iv.next = add i64 %indvars.iv, 1
>   %lftr.wideiv = trunc i64 %indvars.iv.next to i32
> @@ -1029,6 +1029,31 @@ for.end:
>   ret void
> }
> 
> -declare float @fabsf(float) nounwind readnone
> -
> declare double @llvm.pow.f64(double, double) nounwind readnone
> +
> +
> +;CHECK: @not_intrin
> +;CHECK: @round
> +;CHECK-NOT: @round
> +;CHECK: ret
> +define void @not_intrin(i32* nocapture %A) nounwind ssp uwtable {
> +  br label %1
> +
> +; <label>:1                                       ; preds = %1, %0
> +  %indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %1 ]
> +  %2 = getelementptr inbounds i32* %A, i64 %indvars.iv
> +  %3 = load i32* %2, align 4
> +  %4 = add nsw i32 %3, 3
> +  store i32 %4, i32* %2, align 4
> +  %5 = trunc i64 %indvars.iv to i32
> +  tail call void @round(i32 %5) nounwind
> +  %indvars.iv.next = add i64 %indvars.iv, 1
> +  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
> +  %exitcond = icmp eq i32 %lftr.wideiv, 256
> +  br i1 %exitcond, label %6, label %1
> +
> +; <label>:6                                       ; preds = %1
> +  ret void
> +}
> +
> +declare void @round(i32)
> 
> 
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