[llvm] r191059 - Add braces to suppress Clang's dangling-else warning.

David Blaikie dblaikie at gmail.com
Thu Sep 19 17:33:12 PDT 2013


Author: dblaikie
Date: Thu Sep 19 19:33:11 2013
New Revision: 191059

URL: http://llvm.org/viewvc/llvm-project?rev=191059&view=rev
Log:
Add braces to suppress Clang's dangling-else warning.

These violations were introduced in r191049

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=191059&r1=191058&r2=191059&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Sep 19 19:33:11 2013
@@ -3420,7 +3420,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue
       // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
       //   (rotr x, (sub 32, y))
       if (ConstantSDNode *SUBC =
-            dyn_cast<ConstantSDNode>(RExtOp0.getOperand(0)))
+              dyn_cast<ConstantSDNode>(RExtOp0.getOperand(0))) {
         if (SUBC->getAPIntValue() == OpSizeInBits) {
           return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT,
                              LHSShiftArg,
@@ -3442,6 +3442,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue
             return DAG.getNode(LHSShiftArg.getOpcode(), DL, VT, V).getNode();
           }
         }
+      }
     } else if (LExtOp0.getOpcode() == ISD::SUB &&
                RExtOp0 == LExtOp0.getOperand(1)) {
       // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) ->
@@ -3449,7 +3450,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue
       // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext y))) ->
       //   (rotl x, (sub 32, y))
       if (ConstantSDNode *SUBC =
-            dyn_cast<ConstantSDNode>(LExtOp0.getOperand(0)))
+              dyn_cast<ConstantSDNode>(LExtOp0.getOperand(0))) {
         if (SUBC->getAPIntValue() == OpSizeInBits) {
           return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT,
                              LHSShiftArg,
@@ -3471,6 +3472,7 @@ SDNode *DAGCombiner::MatchRotate(SDValue
             return DAG.getNode(RHSShiftArg.getOpcode(), DL, VT, V).getNode();
           }
         }
+      }
     }
   }
 





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