[llvm] r190749 - Fix spelling.
Robert Wilhelm
robert.wilhelm at gmx.net
Sat Sep 14 02:34:24 PDT 2013
Author: row
Date: Sat Sep 14 04:34:24 2013
New Revision: 190749
URL: http://llvm.org/viewvc/llvm-project?rev=190749&view=rev
Log:
Fix spelling.
Modified:
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=190749&r1=190748&r2=190749&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Sat Sep 14 04:34:24 2013
@@ -4201,7 +4201,7 @@ breakPartialRegDependency(MachineBasicBl
// FIXME: In some cases, VLDRS can be changed to a VLD1DUPd32 which defines
// the full D-register by loading the same value to both lanes. The
// instruction is micro-coded with 2 uops, so don't do this until we can
- // properly schedule micro-coded instuctions. The dispatcher stalls cause
+ // properly schedule micro-coded instructions. The dispatcher stalls cause
// too big regressions.
// Insert the dependency-breaking FCONSTD before MI.
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