[PATCH] AArch64: convert VPR64/VPR128 to RegisterOperands

[Tim Northover]

This patch changes the AArch64 backend to use a RegisterOperand rather than a RegisterClass for the vector registers.

The difference is that RegisterOperands are essentially aliases for the RegisterClass with different printing/parsing methods. This matches almost exactly the status of AArch64's vector registers (they use "vN" in SIMD instructions but are really either "qN" or "dN").

Previously we had some rather nasty hierarchy of degenerate sub_xxx aliases, which Kevin Qin has recently discovered makes it virtually impossible to write patterns mapping VPR128 <-> VPR64.

Mostly this appears to simplify the code it touches. The main annoyance is that VPR128 and VPR64 become non-trivial operands and so the alias printer can't handle them (specifically, there's no way to print "mov vD.8b, vN.8b" instead of the "orr" form). However, this is an endemic problem (it already hits integer "mov" for example), so I think that's an acceptable sacrifice.

http://llvm-reviews.chandlerc.com/D1656

Files:
  lib/Target/AArch64/AArch64AsmPrinter.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/AArch64/AArch64InstrNEON.td
  lib/Target/AArch64/AArch64RegisterInfo.td
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
  lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h
  test/MC/AArch64/neon-mov.s
  test/MC/Disassembler/AArch64/neon-instructions.txt
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