[PATCH] [PATCH] Add support for ARMv8 cryptography instructions.
Tim Northover
t.p.northover at gmail.com
Wed Sep 11 09:30:12 PDT 2013
Hi Amara,
Mostly looks fine. Just a couple of comments:
================
Comment at: lib/Target/ARM/ARMInstrNEON.td:5876-5877
@@ +5875,4 @@
+
+def AESD : AES<"d", 0, 1, int_arm_neon_aesd>;
+def AESE : AES<"e", 0, 0, int_arm_neon_aese>;
+def AESIMC : AES<"imc", 1, 1, int_arm_neon_aesimc>;
----------------
I think AESE and AESD actually read-modify-write the qD operand. (The two input operands are "data" and "key" and they produce "data").
Speaking of which some tests for those intrinsics would be a good idea.
================
Comment at: lib/Target/ARM/ARMInstrNEON.td:5858
@@ +5857,3 @@
+let PostEncoderMethod = "NEONThumb2DataIPostEncoder",
+ DecoderNamespace = "NEONData" in {
+ class AES<string op, bit op7, bit op6, SDPatternOperator Int>
----------------
Doesn't this mean the MCInsts get a (trivial) set of predicate operands? I suspect they're benign, but they don't match the definition.
http://llvm-reviews.chandlerc.com/D1645
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