[PATCH] R600: Fix i64 to i32 trunc on SI

Tom Stellard tom at stellard.net
Thu Sep 5 11:52:15 PDT 2013


On Thu, Sep 05, 2013 at 10:21:33AM -0700, Matt Arsenault wrote:
>   Remove datalayout, triple, and comments. Add check lines for evergreen
> 
> http://llvm-reviews.chandlerc.com/D1603
> 
> CHANGE SINCE LAST DIFF
>   http://llvm-reviews.chandlerc.com/D1603?vs=4051&id=4070#toc
> 
> Files:
>   lib/Target/R600/SIISelLowering.cpp
>   test/CodeGen/R600/trunc.ll
> 
> Index: lib/Target/R600/SIISelLowering.cpp
> ===================================================================
> --- lib/Target/R600/SIISelLowering.cpp
> +++ lib/Target/R600/SIISelLowering.cpp
> @@ -90,6 +90,7 @@
>  
>    setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
>    setTruncStoreAction(MVT::f64, MVT::f32, Expand);
> +  setTruncStoreAction(MVT::i64, MVT::i32, Expand);
>  
>    setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
>  
> Index: test/CodeGen/R600/trunc.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/R600/trunc.ll
> @@ -0,0 +1,21 @@
> +; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
> +; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
> +
> +
> +define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) {
> +; SI-LABEL: @trunc_i64_to_i32_store
> +; SI: S_LOAD_DWORD SGPR0, SGPR0_SGPR1, 11
> +; SI: V_MOV_B32_e32 VGPR0, SGPR0
> +; SI: BUFFER_STORE_DWORD VGPR0
> +
> +; EG-LABEL: @trunc_i64_to_i32_store
> +; EG: ALU 2, @4, KC0[CB0:0-32], KC1[]

You can drop this check line as this may change unexpectedly.

> +; EG: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
> +; EG: ALU clause starting at 4:

You can drop this one too.

Otherwise, LGTM.  Feel free to commit with these modifications.

-Tom
> +; EG: LSHR
> +; EG-NEXT: 2(
> +
> +  %result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)* %out, align 4
> +  ret void
> +}
> +

> Index: lib/Target/R600/SIISelLowering.cpp
> ===================================================================
> --- lib/Target/R600/SIISelLowering.cpp
> +++ lib/Target/R600/SIISelLowering.cpp
> @@ -90,6 +90,7 @@
>  
>    setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
>    setTruncStoreAction(MVT::f64, MVT::f32, Expand);
> +  setTruncStoreAction(MVT::i64, MVT::i32, Expand);
>  
>    setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
>  
> Index: test/CodeGen/R600/trunc.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/R600/trunc.ll
> @@ -0,0 +1,21 @@
> +; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
> +; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
> +
> +
> +define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) {
> +; SI-LABEL: @trunc_i64_to_i32_store
> +; SI: S_LOAD_DWORD SGPR0, SGPR0_SGPR1, 11
> +; SI: V_MOV_B32_e32 VGPR0, SGPR0
> +; SI: BUFFER_STORE_DWORD VGPR0
> +
> +; EG-LABEL: @trunc_i64_to_i32_store
> +; EG: ALU 2, @4, KC0[CB0:0-32], KC1[]
> +; EG: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
> +; EG: ALU clause starting at 4:
> +; EG: LSHR
> +; EG-NEXT: 2(
> +
> +  %result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)* %out, align 4
> +  ret void
> +}
> +

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