[PATCH] R600: Fix i64 to i32 trunc on SI

[Tom Stellard]

On Wed, Sep 04, 2013 at 11:49:11PM -0700, Matt Arsenault wrote:
> I'm not particularly familiar with SI ISA, but the result looks about right (though with almost twice as many instructions as the shader compiler produces)
> 
> http://llvm-reviews.chandlerc.com/D1603
> 
> Files:
>   lib/Target/R600/SIISelLowering.cpp
>   test/CodeGen/R600/trunc.ll
> 
> Index: lib/Target/R600/SIISelLowering.cpp
> ===================================================================
> --- lib/Target/R600/SIISelLowering.cpp
> +++ lib/Target/R600/SIISelLowering.cpp
> @@ -90,6 +90,7 @@
>  
>    setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
>    setTruncStoreAction(MVT::f64, MVT::f32, Expand);
> +  setTruncStoreAction(MVT::i64, MVT::i32, Expand);
>  
>    setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
>  
> Index: test/CodeGen/R600/trunc.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/R600/trunc.ll
> @@ -0,0 +1,31 @@
> +; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck %s
> +
> +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
> +target triple = "r600--"
> +

I don't usually put the datalayout or triple in the test cases.  Does
llc automatically add one based on the -march and -mcpu options?

> +define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) {
> +; CHECK-LABEL: @trunc_i64_to_i32_store
> +; CHECK: S_LOAD_DWORD SGPR0, SGPR0_SGPR1, 11
> +; CHECK: V_MOV_B32_e32 VGPR0, SGPR0
> +; CHECK: BUFFER_STORE_DWORD VGPR0
> +  %result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)*
> +  %out, align 4 ret void
> +}
> +
> +; This function ends up being empty?
> +; define i32 @trunc_i64_to_i32(i64 %in) {
> +;   %result = trunc i64 %in to i32
> +;   ret i32 %result
> +; }

The backend only supports kernel functions, which are always void, so it
is likely ignoring the return value here.  I think we can drop this test
case.

-Tom

> +
> +
> +; sc produces:
> +; shader main asic(SI) type(CS)
> +;   s_buffer_load_dword s0, s[8:11], 0x00 // 00000000: C2000900
> +;   s_buffer_load_dword s1, s[8:11], 0x04 // 00000004: C2008904
> +;   s_waitcnt lgkmcnt(0) // 00000008: BF8C007F v_mov_b32 v0, s0 //
> +;   0000000C: 7E000200 v_mov_b32 v1, s1 // 00000010: 7E020201
> +;   tbuffer_store_format_x v1, v0, s[4:7], 0 offen
> +;   format:[BUF_DATA_FORMAT_32,BUF_NUM_FORMAT_FLOAT] // 00000014:
> +;   EBA41000 80010100 s_endpgm // 0000001C: BF810000 end
> +

> Index: lib/Target/R600/SIISelLowering.cpp
> ===================================================================
> --- lib/Target/R600/SIISelLowering.cpp
> +++ lib/Target/R600/SIISelLowering.cpp
> @@ -90,6 +90,7 @@
>  
>    setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
>    setTruncStoreAction(MVT::f64, MVT::f32, Expand);
> +  setTruncStoreAction(MVT::i64, MVT::i32, Expand);
>  
>    setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
>  
> Index: test/CodeGen/R600/trunc.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/R600/trunc.ll
> @@ -0,0 +1,31 @@
> +; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck %s
> +
> +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
> +target triple = "r600--"
> +
> +define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) {
> +; CHECK-LABEL: @trunc_i64_to_i32_store
> +; CHECK: S_LOAD_DWORD SGPR0, SGPR0_SGPR1, 11
> +; CHECK: V_MOV_B32_e32 VGPR0, SGPR0
> +; CHECK: BUFFER_STORE_DWORD VGPR0
> +  %result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)*
> +  %out, align 4 ret void
> +}
> +
> +; This function ends up being empty?
> +; define i32 @trunc_i64_to_i32(i64 %in) {
> +;   %result = trunc i64 %in to i32
> +;   ret i32 %result
> +; }
> +
> +
> +; sc produces:
> +; shader main asic(SI) type(CS)
> +;   s_buffer_load_dword s0, s[8:11], 0x00 // 00000000: C2000900
> +;   s_buffer_load_dword s1, s[8:11], 0x04 // 00000004: C2008904
> +;   s_waitcnt lgkmcnt(0) // 00000008: BF8C007F v_mov_b32 v0, s0 //
> +;   0000000C: 7E000200 v_mov_b32 v1, s1 // 00000010: 7E020201
> +;   tbuffer_store_format_x v1, v0, s[4:7], 0 offen
> +;   format:[BUF_DATA_FORMAT_32,BUF_NUM_FORMAT_FLOAT] // 00000014:
> +;   EBA41000 80010100 s_endpgm // 0000001C: BF810000 end
> +

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