[llvm] r189854 - Teach InstCombineLoadCast about address spaces.
Matt Arsenault
Matthew.Arsenault at amd.com
Tue Sep 3 14:05:48 PDT 2013
Author: arsenm
Date: Tue Sep 3 16:05:48 2013
New Revision: 189854
URL: http://llvm.org/viewvc/llvm-project?rev=189854&view=rev
Log:
Teach InstCombineLoadCast about address spaces.
This is another one that doesn't matter much,
but uses the right GEP index types in the first
place.
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
llvm/trunk/test/Transforms/InstCombine/align-addr.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp?rev=189854&r1=189853&r2=189854&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp Tue Sep 3 16:05:48 2013
@@ -304,8 +304,8 @@ static Instruction *InstCombineLoadCast(
if (Constant *CSrc = dyn_cast<Constant>(CastOp))
if (ASrcTy->getNumElements() != 0) {
Type *IdxTy = TD
- ? TD->getIntPtrType(LI.getContext())
- : Type::getInt64Ty(LI.getContext());
+ ? TD->getIntPtrType(SrcTy)
+ : Type::getInt64Ty(SrcTy->getContext());
Value *Idx = Constant::getNullValue(IdxTy);
Value *Idxs[2] = { Idx, Idx };
CastOp = ConstantExpr::getGetElementPtr(CSrc, Idxs);
Modified: llvm/trunk/test/Transforms/InstCombine/align-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/align-addr.ll?rev=189854&r1=189853&r2=189854&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/align-addr.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/align-addr.ll Tue Sep 3 16:05:48 2013
@@ -1,5 +1,5 @@
; RUN: opt < %s -instcombine -S | FileCheck %s
-target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
+target datalayout = "E-p:64:64:64-p1:32:32:32-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
; Instcombine should be able to prove vector alignment in the
; presence of a few mild address computation tricks.
@@ -47,6 +47,27 @@ entry:
ret <16 x i8> %tmp
}
+ at GLOBAL_as1 = internal addrspace(1) global [4 x i32] zeroinitializer
+
+define <16 x i8> @test1_as1(<2 x i64> %x) {
+; CHECK-LABEL: @test1_as1(
+; CHECK: tmp = load
+; CHECK: GLOBAL_as1{{.*}}align 16
+ %tmp = load <16 x i8> addrspace(1)* bitcast ([4 x i32] addrspace(1)* @GLOBAL_as1 to <16 x i8> addrspace(1)*), align 1
+ ret <16 x i8> %tmp
+}
+
+ at GLOBAL_as1_gep = internal addrspace(1) global [8 x i32] zeroinitializer
+
+define <16 x i8> @test1_as1_gep(<2 x i64> %x) {
+; CHECK-LABEL: @test1_as1_gep(
+; CHECK: tmp = load
+; CHECK: GLOBAL_as1_gep{{.*}}align 16
+ %tmp = load <16 x i8> addrspace(1)* bitcast (i32 addrspace(1)* getelementptr ([8 x i32] addrspace(1)* @GLOBAL_as1_gep, i16 0, i16 4) to <16 x i8> addrspace(1)*), align 1
+ ret <16 x i8> %tmp
+}
+
+
; When a load or store lacks an explicit alignment, add one.
; CHECK-LABEL: @test2(
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