[PATCH] Teach InstCombineLoadCast about address spaces

Eli Friedman eli.friedman at gmail.com
Tue Sep 3 13:31:18 PDT 2013


LGTM.

-Eli


On Tue, Sep 3, 2013 at 12:18 PM, Matt Arsenault
<Matthew.Arsenault at amd.com>wrote:

> This is another one that doesn't matter much, but uses the right GEP index
> types in the first place. The tests just make sure this is hit with a
> non-zero, different sized address space. The result doesn't actually change.
>
> http://llvm-reviews.chandlerc.com/D1586
>
> Files:
>   lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
>   test/Transforms/InstCombine/align-addr.ll
>
> Index: lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
> ===================================================================
> --- lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
> +++ lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
> @@ -304,8 +304,8 @@
>          if (Constant *CSrc = dyn_cast<Constant>(CastOp))
>            if (ASrcTy->getNumElements() != 0) {
>              Type *IdxTy = TD
> -                        ? TD->getIntPtrType(LI.getContext())
> -                        : Type::getInt64Ty(LI.getContext());
> +                        ? TD->getIntPtrType(SrcTy)
> +                        : Type::getInt64Ty(SrcTy->getContext());
>              Value *Idx = Constant::getNullValue(IdxTy);
>              Value *Idxs[2] = { Idx, Idx };
>              CastOp = ConstantExpr::getGetElementPtr(CSrc, Idxs);
> Index: test/Transforms/InstCombine/align-addr.ll
> ===================================================================
> --- test/Transforms/InstCombine/align-addr.ll
> +++ test/Transforms/InstCombine/align-addr.ll
> @@ -1,5 +1,5 @@
>  ; RUN: opt < %s -instcombine -S | FileCheck %s
> -target datalayout =
> "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
> +target datalayout =
> "E-p:64:64:64-p1:32:32:32-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
>
>  ; Instcombine should be able to prove vector alignment in the
>  ; presence of a few mild address computation tricks.
> @@ -47,6 +47,27 @@
>         ret <16 x i8> %tmp
>  }
>
> + at GLOBAL_as1 = internal addrspace(1) global [4 x i32] zeroinitializer
> +
> +define <16 x i8> @test1_as1(<2 x i64> %x) {
> +; CHECK-LABEL: @test1_as1(
> +; CHECK: tmp = load
> +; CHECK: GLOBAL_as1{{.*}}align 16
> +  %tmp = load <16 x i8> addrspace(1)* bitcast ([4 x i32] addrspace(1)*
> @GLOBAL_as1 to <16 x i8> addrspace(1)*), align 1
> +  ret <16 x i8> %tmp
> +}
> +
> + at GLOBAL_as1_gep = internal addrspace(1) global [8 x i32] zeroinitializer
> +
> +define <16 x i8> @test1_as1_gep(<2 x i64> %x) {
> +; CHECK-LABEL: @test1_as1_gep(
> +; CHECK: tmp = load
> +; CHECK: GLOBAL_as1_gep{{.*}}align 16
> +  %tmp = load <16 x i8> addrspace(1)* bitcast (i32 addrspace(1)*
> getelementptr ([8 x i32] addrspace(1)* @GLOBAL_as1_gep, i16 0, i16 4) to
> <16 x i8> addrspace(1)*), align 1
> +  ret <16 x i8> %tmp
> +}
> +
> +
>  ; When a load or store lacks an explicit alignment, add one.
>
>  ; CHECK-LABEL: @test2(
>
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