[PATCH][AArch64] implement 3 aarch64 neon instrunctions (umov smov ins) in llvm

[Kevin Qin]

Hi,

   Attached is implementation of 'umov', 'smov' and 'ins' in llvm, covering
both of MC definition and IR pattern match.

1)  smov is implemented as signed-extend following to extractelement.
2) umov is implemented as zero-extend following to extractelement, or just
extractelement only.
3) ins has 2 versions: one is insert from main, which is implemented as
insertelement; the other is insert from element, which is implemented
as insertelement
following to extractelement.

To avoid legalizing signed-extend and zero-extend to 'and' and
'sign_extend_inreg', we combined them with extractelement in early combine
stage, presenting as 'Neon_vector_extract' node.

Also, some codes are added to copyPhysReg() function to let llvm know how
to use these instructions when generating copy machine instruction between
GPR and FPR.

Please review this patch, thanks.

-- 
Best Regards,

Kevin Qin
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