[llvm] r189690 - Fix a problem with dual mips16/mips32 mode. When the underlying processor

reed kotler rkotler at mips.com
Fri Aug 30 13:10:36 PDT 2013


Hi Bill,

yes, your code is better. it should be an assertion if it were a real 
check but it was really just some debugging code that slipped though. 
It's not possible for that to
happen if the attributes module is working properly.

This whole function is going to be deleted soon when I clean up how 
soft-float is communicated for mips16 and is not really necessary for 
this fix but i did it to leave the function attributes in a correct 
state and not just ignore the soft-float.

in any case, this code you are mentioning should really be merged into 
the attribute set and function class. i was going to do that but it was 
not needed for this patch to work and did not want to delay the patch 
waiting for approval to target independent code.

it should be possible to remove attributes by just specifying the string 
and now you can only do it by specifying an index. i can submit that 
patch if you want.

Reed

On 08/30/2013 01:00 PM, Bill Wendling wrote:
> On Aug 30, 2013, at 12:40 PM, Reed Kotler <rkotler at mips.com> wrote:
>
>> Author: rkotler
>> Date: Fri Aug 30 14:40:56 2013
>> New Revision: 189690
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=189690&view=rev
>> Log:
>> Fix a problem with dual mips16/mips32 mode. When the underlying processor
>> has hard float, when you compile the mips32 code you have to make sure
>> that it knows to compile any mips32 routines as hard float. I need to clean
>> up the way mips16 hard float is specified but I need to first think through
>> all the details. Mips16 always has a form of soft float, the difference being
>> whether the underlying hardware has floating point. So it's not really
>> necessary to pass the -soft-float to llvm since soft-float is always true
>> for mips16 by virtue of the fact that it will not register floating point
>> registers. By using this fact, I can simplify the way this is all handled.
>>
>>
>> Added:
>>     llvm/trunk/test/CodeGen/Mips/nomips16.ll
>> Modified:
>>     llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp
>>     llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
>>     llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp
>>     llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
>>     llvm/trunk/lib/Target/Mips/MipsSubtarget.h
>>
>> Modified: llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp?rev=189690&r1=189689&r2=189690&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp (original)
>> +++ llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp Fri Aug 30 14:40:56 2013
>> @@ -430,6 +430,21 @@ static void createFPFnStub(Function *F,
>>    new UnreachableInst(FStub->getContext(), BB);
>> }
>>
>> +//
>> +// remove the use-soft-float attribute
>> +//
>> +static void removeUseSoftFloat(Function &F) {
>> +  AttributeSet A;
>> +  DEBUG(errs() << "removing -use-soft-float\n");
>> +  A = A.addAttribute(F.getContext(), AttributeSet::FunctionIndex,
>> +                     "use-soft-float", "false");
>> +  F.removeAttributes(AttributeSet::FunctionIndex, A);
>> +  if (F.hasFnAttribute("use-soft-float")) {
>> +    DEBUG(errs() << "still has -use-soft-float\n");
>> +  }
> This is small, and I know this if-then will probably be optimized out, but would you want to do something like this instead?
>
>    assert(!F.hasFnAttribute("use-soft-float") && "Still has use-soft-float attribute!");
>
> -bw
>
>> +  F.addAttributes(AttributeSet::FunctionIndex, A);
>> +}
>> +
>> namespace llvm {
>>
>> //
>> @@ -453,6 +468,11 @@ bool Mips16HardFloat::runOnModule(Module
>>    DEBUG(errs() << "Run on Module Mips16HardFloat\n");
>>    bool Modified = false;
>>    for (Module::iterator F = M.begin(), E = M.end(); F != E; ++F) {
>> +    if (F->hasFnAttribute("nomips16") &&
>> +        F->hasFnAttribute("use-soft-float")) {
>> +      removeUseSoftFloat(*F);
>> +      continue;
>> +    }
>>      if (F->isDeclaration() || F->hasFnAttribute("mips16_fp_stub") ||
>>          F->hasFnAttribute("nomips16")) continue;
>>      Modified |= fixupFPReturnAndCall(*F, &M, Subtarget);
>>
>> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=189690&r1=189689&r2=189690&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Fri Aug 30 14:40:56 2013
>> @@ -2334,7 +2334,7 @@ MipsTargetLowering::LowerCall(TargetLowe
>>                      SpecialCallingConv);
>>
>>    MipsCCInfo.analyzeCallOperands(Outs, IsVarArg,
>> -                                 getTargetMachine().Options.UseSoftFloat,
>> +                                 Subtarget->mipsSEUsesSoftFloat(),
>>                                   Callee.getNode(), CLI.Args);
>>
>>    // Get a count of how many bytes are to be pushed on the stack.
>> @@ -2520,7 +2520,7 @@ MipsTargetLowering::LowerCallResult(SDVa
>>                   getTargetMachine(), RVLocs, *DAG.getContext());
>>    MipsCC MipsCCInfo(CallConv, IsO32, Subtarget->isFP64bit(), CCInfo);
>>
>> -  MipsCCInfo.analyzeCallResult(Ins, getTargetMachine().Options.UseSoftFloat,
>> +  MipsCCInfo.analyzeCallResult(Ins, Subtarget->mipsSEUsesSoftFloat(),
>>                                 CallNode, RetTy);
>>
>>    // Copy all of the result registers out of their specified physreg.
>> @@ -2568,7 +2568,7 @@ MipsTargetLowering::LowerFormalArguments
>>    MipsCC MipsCCInfo(CallConv, IsO32, Subtarget->isFP64bit(), CCInfo);
>>    Function::const_arg_iterator FuncArg =
>>      DAG.getMachineFunction().getFunction()->arg_begin();
>> -  bool UseSoftFloat = getTargetMachine().Options.UseSoftFloat;
>> +  bool UseSoftFloat = Subtarget->mipsSEUsesSoftFloat();
>>
>>    MipsCCInfo.analyzeFormalArguments(Ins, UseSoftFloat, FuncArg);
>>    MipsFI->setFormalArgInfo(CCInfo.getNextStackOffset(),
>> @@ -2728,7 +2728,7 @@ MipsTargetLowering::LowerReturn(SDValue
>>    MipsCC MipsCCInfo(CallConv, IsO32, Subtarget->isFP64bit(), CCInfo);
>>
>>    // Analyze return values.
>> -  MipsCCInfo.analyzeReturn(Outs, getTargetMachine().Options.UseSoftFloat,
>> +  MipsCCInfo.analyzeReturn(Outs, Subtarget->mipsSEUsesSoftFloat(),
>>                             MF.getFunction()->getReturnType());
>>
>>    SDValue Flag;
>>
>> Modified: llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp?rev=189690&r1=189689&r2=189690&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp Fri Aug 30 14:40:56 2013
>> @@ -87,7 +87,7 @@ MipsSETargetLowering::MipsSETargetLoweri
>>      addMSAType(MVT::v2f64, &Mips::MSA128DRegClass);
>>    }
>>
>> -  if (!TM.Options.UseSoftFloat) {
>> +  if (!Subtarget->mipsSEUsesSoftFloat()) {
>>      addRegisterClass(MVT::f32, &Mips::FGR32RegClass);
>>
>>      // When dealing with single precision only, use libcalls
>>
>> Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=189690&r1=189689&r2=189690&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
>> +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Fri Aug 30 14:40:56 2013
>> @@ -155,3 +155,6 @@ void MipsSubtarget::resetSubtarget(Machi
>>    }
>> }
>>
>> +bool MipsSubtarget::mipsSEUsesSoftFloat() const {
>> +  return TM->Options.UseSoftFloat && !InMips16HardFloat;
>> +}
>>
>> Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=189690&r1=189689&r2=189690&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
>> +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Fri Aug 30 14:40:56 2013
>> @@ -192,6 +192,8 @@ public:
>>
>>    bool hasStandardEncoding() const { return !inMips16Mode(); }
>>
>> +  bool mipsSEUsesSoftFloat() const;
>> +
>>    /// Features related to the presence of specific instructions.
>>    bool hasSEInReg()   const { return HasSEInReg; }
>>    bool hasCondMov()   const { return HasCondMov; }
>>
>> Added: llvm/trunk/test/CodeGen/Mips/nomips16.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/nomips16.ll?rev=189690&view=auto
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/Mips/nomips16.ll (added)
>> +++ llvm/trunk/test/CodeGen/Mips/nomips16.ll Fri Aug 30 14:40:56 2013
>> @@ -0,0 +1,38 @@
>> +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -mips16-hard-float -soft-float -relocation-model=static < %s | FileCheck %s
>> +
>> + at x = global float 0.000000e+00, align 4
>> + at .str = private unnamed_addr constant [20 x i8] c"in main: mips16 %f\0A\00", align 1
>> +
>> +; Function Attrs: nounwind
>> +define void @foo() #0 {
>> +entry:
>> +  %0 = load float* @x, align 4
>> +  %conv = fpext float %0 to double
>> +  %add = fadd double %conv, 1.500000e+00
>> +  %conv1 = fptrunc double %add to float
>> +  store float %conv1, float* @x, align 4
>> +  ret void
>> +}
>> +; CHECK: 	.ent	foo
>> +; CHECK: 	jal	__mips16_extendsfdf2
>> +; CHECK:   	.end	foo
>> +
>> +; Function Attrs: nounwind
>> +define void @nofoo() #1 {
>> +entry:
>> +  %0 = load float* @x, align 4
>> +  %conv = fpext float %0 to double
>> +  %add = fadd double %conv, 3.900000e+00
>> +  %conv1 = fptrunc double %add to float
>> +  store float %conv1, float* @x, align 4
>> +  ret void
>> +}
>> +
>> +; CHECK: 	.ent	nofoo
>> +; CHECK: 	cvt.d.s	$f{{.+}}, $f{{.+}}
>> +; CHECK: 	.end	nofoo
>> +
>> +
>> +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
>> +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
>> +
>>
>>
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