[llvm] r189656 - Fixup BZHI selection to remove an unneeded zero extension.

[Craig Topper]

Author: ctopper
Date: Fri Aug 30 02:16:16 2013
New Revision: 189656

URL: http://llvm.org/viewvc/llvm-project?rev=189656&view=rev
Log:
Fixup BZHI selection to remove an unneeded zero extension.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=189656&r1=189655&r2=189656&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Aug 30 02:16:16 2013
@@ -17320,8 +17320,7 @@ static SDValue PerformAndCombine(SDNode
           assert(N001.getValueType() == MVT::i8 && "unexpected type");
           ConstantSDNode *C = dyn_cast<ConstantSDNode>(N00.getOperand(0));
           if (C && C->getZExtValue() == 1)
-            return DAG.getNode(X86ISD::BZHI, DL, VT, N1,
-                               DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N001));
+            return DAG.getNode(X86ISD::BZHI, DL, VT, N1, N001);
         }
       }
 
@@ -17333,8 +17332,7 @@ static SDValue PerformAndCombine(SDNode
           assert(N101.getValueType() == MVT::i8 && "unexpected type");
           ConstantSDNode *C = dyn_cast<ConstantSDNode>(N10.getOperand(0));
           if (C && C->getZExtValue() == 1)
-            return DAG.getNode(X86ISD::BZHI, DL, VT, N0,
-                               DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N101));
+            return DAG.getNode(X86ISD::BZHI, DL, VT, N0, N101);
         }
       }
     }

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=189656&r1=189655&r2=189656&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Aug 30 02:16:16 2013
@@ -252,7 +252,7 @@ def X86and_flag  : SDNode<"X86ISD::AND",
 def X86blsi   : SDNode<"X86ISD::BLSI",   SDTIntUnaryOp>;
 def X86blsmsk : SDNode<"X86ISD::BLSMSK", SDTIntUnaryOp>;
 def X86blsr   : SDNode<"X86ISD::BLSR",   SDTIntUnaryOp>;
-def X86bzhi   : SDNode<"X86ISD::BZHI",   SDTIntBinOp>;
+def X86bzhi   : SDNode<"X86ISD::BZHI",   SDTIntShiftOp>;
 
 def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>;
 
@@ -1856,14 +1856,18 @@ let Predicates = [HasBMI2], Defs = [EFLA
                                int_x86_bmi_bzhi_64, loadi64>, VEX_W;
 }
 
-def : Pat<(X86bzhi GR32:$src1, GR32:$src2),
-          (BZHI32rr GR32:$src1, GR32:$src2)>;
-def : Pat<(X86bzhi (loadi32 addr:$src1), GR32:$src2),
-          (BZHI32rm addr:$src1, GR32:$src2)>;
-def : Pat<(X86bzhi GR64:$src1, GR64:$src2),
-          (BZHI64rr GR64:$src1, GR64:$src2)>;
-def : Pat<(X86bzhi (loadi64 addr:$src1), GR64:$src2),
-          (BZHI64rm addr:$src1, GR64:$src2)>;
+def : Pat<(X86bzhi GR32:$src1, GR8:$src2),
+          (BZHI32rr GR32:$src1,
+                    (INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
+def : Pat<(X86bzhi (loadi32 addr:$src1), GR8:$src2),
+          (BZHI32rm addr:$src1,
+                    (INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
+def : Pat<(X86bzhi GR64:$src1, GR8:$src2),
+          (BZHI64rr GR64:$src1,
+                    (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
+def : Pat<(X86bzhi (loadi64 addr:$src1), GR8:$src2),
+          (BZHI64rm addr:$src1,
+                    (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
 
 multiclass bmi_pdep_pext<string mnemonic, RegisterClass RC,
                          X86MemOperand x86memop, Intrinsic Int,