[PATCH] [ms-inline asm] Support offsets after segment registers

[David Majnemer]

    - Further address comments

Hi craig.topper, rnk,

http://llvm-reviews.chandlerc.com/D1470

CHANGE SINCE LAST DIFF
  http://llvm-reviews.chandlerc.com/D1470?vs=3760&id=3773#toc

Files:
  lib/Target/X86/AsmParser/X86AsmParser.cpp
  test/MC/X86/intel-syntax.s

Index: lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -497,6 +497,8 @@
   X86Operand *ParseIntelOffsetOfOperator();
   X86Operand *ParseIntelDotOperator(const MCExpr *Disp, const MCExpr *&NewDisp);
   X86Operand *ParseIntelOperator(unsigned OpKind);
+  X86Operand *CreateIntelSegmentOffset(unsigned SegReg, int64_t ImmDisp,
+                                       SMLoc Start, SMLoc End, unsigned Size);
   X86Operand *ParseIntelMemOperand(unsigned SegReg, int64_t ImmDisp,
                                    SMLoc StartLoc);
   X86Operand *ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End);
@@ -1424,6 +1426,20 @@
   return 0;
 }
 
+/// \brief Parse intel style segment offset.
+X86Operand *X86AsmParser::CreateIntelSegmentOffset(unsigned SegReg,
+                                                   int64_t ImmDisp, SMLoc Start,
+                                                   SMLoc End, unsigned Size) {
+  if (SegReg && (getLexer().is(AsmToken::Comma) ||
+                 getLexer().is(AsmToken::EndOfStatement))) {
+    // We know we hit a segment offset if the next token after the immediate we
+    // just parsed is a comma or the end of the statement.
+    const MCExpr *Disp = MCConstantExpr::Create(ImmDisp, getContext());
+    return X86Operand::CreateMem(SegReg, Disp, /*BaseReg=*/0, /*IndexReg=*/0,
+                                 /*Scale=*/1, Start, End, Size);
+  }
+  return 0;
+}
 /// ParseIntelMemOperand - Parse intel style memory operand.
 X86Operand *X86AsmParser::ParseIntelMemOperand(unsigned SegReg,
                                                int64_t ImmDisp,
@@ -1439,13 +1455,22 @@
     Parser.Lex(); // Eat ptr.
   }
 
-  // Parse ImmDisp [ BaseReg + Scale*IndexReg + Disp ].
+  // Parse ImmDisp.
+  // - If we are dealing with a segment and the displacement is the only memory
+  //   operand after the colon, use it.
+  // - Otherwise, try to parse [ BaseReg + Scale*IndexReg + Disp ].
   if (getLexer().is(AsmToken::Integer)) {
+    int64_t ImmDisp = Tok.getIntVal();
+    AsmToken ImmDispToken = Parser.Lex(); // Eat the integer.
+
+    if (X86Operand *SegmentOffsetOp = CreateIntelSegmentOffset(
+            SegReg, ImmDisp, Start, ImmDispToken.getEndLoc(), Size))
+      return SegmentOffsetOp;
+
     if (isParsingInlineAsm())
       InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_ImmPrefix,
-                                                  Tok.getLoc()));
-    int64_t ImmDisp = Tok.getIntVal();
-    Parser.Lex(); // Eat the integer.
+                                                  ImmDispToken.getLoc()));
+
     if (getLexer().isNot(AsmToken::LBrac))
       return ErrorOperand(Start, "Expected '[' token!");
     return ParseIntelBracExpression(SegReg, Start, ImmDisp, Size);
@@ -1459,6 +1484,13 @@
     if (getLexer().isNot(AsmToken::Colon))
       return ErrorOperand(Start, "Expected ':' token!");
     Parser.Lex(); // Eat :
+    if (getLexer().is(AsmToken::Integer)) {
+      int64_t ImmDisp = Tok.getIntVal();
+      AsmToken ImmDispToken = Parser.Lex(); // Eat the integer.
+      if (X86Operand *SegmentOffsetOp = CreateIntelSegmentOffset(
+              SegReg, ImmDisp, Start, ImmDispToken.getEndLoc(), Size))
+        return SegmentOffsetOp;
+    }
     if (getLexer().isNot(AsmToken::LBrac))
       return ErrorOperand(Start, "Expected '[' token!");
     return ParseIntelBracExpression(SegReg, Start, ImmDisp, Size);
Index: test/MC/X86/intel-syntax.s
===================================================================
--- test/MC/X86/intel-syntax.s
+++ test/MC/X86/intel-syntax.s
@@ -63,6 +63,10 @@
     mov ECX, DWORD PTR [4*ECX + _fnan]
 // CHECK: movq %fs:320, %rax
     mov RAX, QWORD PTR FS:[320]
+// CHECK: movq %fs:320, %rax
+    mov RAX, QWORD PTR FS:320
+// CHECK: movq %rax, %fs:320
+    mov QWORD PTR FS:320, RAX
 // CHECK: vpgatherdd %xmm8, (%r15,%xmm9,2), %xmm1
     vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8
 // CHECK: movsd	-8, %xmm5
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