[llvm] r189096 - ARM: make sure ARM-mode pseudo-inst requires IsARM
Tim Northover
tnorthover at apple.com
Fri Aug 23 03:16:39 PDT 2013
Author: tnorthover
Date: Fri Aug 23 05:16:39 2013
New Revision: 189096
URL: http://llvm.org/viewvc/llvm-project?rev=189096&view=rev
Log:
ARM: make sure ARM-mode pseudo-inst requires IsARM
I'd forgotten that "Requires" blocks override rather than add to the
constraints, so my pseudo-instruction was being selected in Thumb mode leading
to nonsense instructions.
rdar://problem/14817358
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=189096&r1=189095&r2=189096&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Aug 23 05:16:39 2013
@@ -4197,7 +4197,7 @@ def MOVCCi32imm
8, IIC_iCMOVix2,
[(set GPR:$Rd, (ARMcmov GPR:$false, imm:$src,
cmovpred:$p))]>,
- RegConstraint<"$false = $Rd">, Requires<[HasV6T2]>;
+ RegConstraint<"$false = $Rd">, Requires<[IsARM, HasV6T2]>;
let isMoveImm = 1 in
def MVNCCi : ARMPseudoInst<(outs GPR:$Rd),
Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll?rev=189096&r1=189095&r2=189096&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-select.ll Fri Aug 23 05:16:39 2013
@@ -99,8 +99,17 @@ entry:
define i32 @f10(i32 %a, i32 %b) {
; CHECK-LABEL: f10:
-; CHECK: movwne r2, #1234 @ encoding: [0x40,0xf2,0xd2,0x42]
+; CHECK: movwne {{r[0-9]+}}, #1234 @ encoding: [0x40,0xf2,0xd2,0x4{{[0-9a-f]+}}]
%tst = icmp ne i32 %a, %b
%val = select i1 %tst, i32 1234, i32 12345
ret i32 %val
}
+
+; Make sure we pick the Thumb encoding for movw/movt
+define i32 @f11(i32 %a, i32 %b) {
+; CHECK-LABEL: f11:
+; CHECK: movwne {{r[0-9]+}}, #50033 @ encoding: [0x4c,0xf2,0x71,0x3{{[0-9a-f]+}}]
+ %tst = icmp ne i32 %a, %b
+ %val = select i1 %tst, i32 123454321, i32 543212345
+ ret i32 %val
+}
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