[llvm] r189095 - [mips][msa] Split MSA128 regset into size-specific sets containing the same registers.
Daniel Sanders
daniel.sanders at imgtec.com
Fri Aug 23 03:10:13 PDT 2013
Author: dsanders
Date: Fri Aug 23 05:10:13 2013
New Revision: 189095
URL: http://llvm.org/viewvc/llvm-project?rev=189095&view=rev
Log:
[mips][msa] Split MSA128 regset into size-specific sets containing the same registers.
Modified:
llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td
llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp
llvm/trunk/lib/Target/Mips/MipsSEISelLowering.h
Modified: llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td?rev=189095&r1=189094&r2=189095&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td Fri Aug 23 05:10:13 2013
@@ -815,675 +815,675 @@ class MSA_VEC_DESC_BASE<string instr_asm
}
class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128B, MSA128B>, IsCommutable;
class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128H, MSA128H>, IsCommutable;
class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128W, MSA128W>, IsCommutable;
class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128D, MSA128D>, IsCommutable;
class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128B, MSA128B>,
IsCommutable;
class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128H>,
IsCommutable;
class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128B, MSA128B>,
IsCommutable;
class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128H>,
IsCommutable;
class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128B, MSA128B>,
IsCommutable;
class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128H>,
IsCommutable;
class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", int_mips_addv_b, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128B, MSA128B>, IsCommutable;
class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", int_mips_addv_h, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128H, MSA128H>, IsCommutable;
class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", int_mips_addv_w, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128W, MSA128W>, IsCommutable;
class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", int_mips_addv_d, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128D, MSA128D>, IsCommutable;
class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", int_mips_and_v, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128B, MSA128B>, IsCommutable;
class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128H, MSA128H>, IsCommutable;
class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128W, MSA128W>, IsCommutable;
class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128D, MSA128D>, IsCommutable;
class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128B, MSA128B>, IsCommutable;
class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128H, MSA128H>, IsCommutable;
class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128W, MSA128W>, IsCommutable;
class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128D, MSA128D>, IsCommutable;
class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128B, MSA128B>,
IsCommutable;
class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128H>,
IsCommutable;
class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128B, MSA128B>,
IsCommutable;
class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128H>,
IsCommutable;
class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128B, MSA128B>, IsCommutable;
class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128H, MSA128H>, IsCommutable;
class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128W, MSA128W>, IsCommutable;
class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, NoItinerary,
- MSA128, MSA128>, IsCommutable;
+ MSA128D, MSA128D>, IsCommutable;
class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b,
- NoItinerary, GPR32, MSA128>;
+ NoItinerary, GPR32, MSA128B>;
class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h,
- NoItinerary, GPR32, MSA128>;
+ NoItinerary, GPR32, MSA128H>;
class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w,
- NoItinerary, GPR32, MSA128>;
+ NoItinerary, GPR32, MSA128W>;
class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b,
- NoItinerary, GPR32, MSA128>;
+ NoItinerary, GPR32, MSA128B>;
class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h,
- NoItinerary, GPR32, MSA128>;
+ NoItinerary, GPR32, MSA128H>;
class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w,
- NoItinerary, GPR32, MSA128>;
+ NoItinerary, GPR32, MSA128W>;
class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", int_mips_div_s_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", int_mips_div_s_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", int_mips_div_s_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", int_mips_div_s_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", int_mips_div_u_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", int_mips_div_u_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", int_mips_div_u_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", int_mips_div_u_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class DOTP_S_B_DESC : MSA_3R_DESC_BASE<"dotp_s.b", int_mips_dotp_s_b,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128B, MSA128B>,
IsCommutable;
class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128H>,
IsCommutable;
class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class DOTP_U_B_DESC : MSA_3R_DESC_BASE<"dotp_u.b", int_mips_dotp_u_b,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128B, MSA128B>,
IsCommutable;
class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128H>,
IsCommutable;
class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128B>,
IsCommutable;
class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128H>,
IsCommutable;
class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128W>,
IsCommutable;
class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128H, MSA128B>,
IsCommutable;
class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128H>,
IsCommutable;
class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128W>,
IsCommutable;
class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128B>;
class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128H>;
class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128W>;
class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128B>;
class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128H>;
class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128W>;
class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", int_mips_fadd_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", int_mips_fadd_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128W, MSA128W>,
IsCommutable;
class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d,
- NoItinerary, MSA128, MSA128>,
+ NoItinerary, MSA128D, MSA128D>,
IsCommutable;
class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", int_mips_fdiv_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", int_mips_fdiv_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128W>;
class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128D>;
class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128H>;
class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128W>;
class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128H>;
class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128W>;
class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128H>;
class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128W>;
class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128H>;
class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128W>;
class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", int_mips_fill_b,
- NoItinerary, MSA128, GPR32>;
+ NoItinerary, MSA128B, GPR32>;
class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", int_mips_fill_h,
- NoItinerary, MSA128, GPR32>;
+ NoItinerary, MSA128H, GPR32>;
class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", int_mips_fill_w,
- NoItinerary, MSA128, GPR32>;
+ NoItinerary, MSA128W, GPR32>;
class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", int_mips_flog2_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", int_mips_flog2_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", int_mips_fmul_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", int_mips_fmul_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", int_mips_frint_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", int_mips_frint_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", int_mips_fsqrt_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", int_mips_fsqrt_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", int_mips_fsub_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", int_mips_fsub_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128W>;
class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128D>;
class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b,
- NoItinerary, MSA128, GPR32>;
+ NoItinerary, MSA128B, GPR32>;
class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h,
- NoItinerary, MSA128, GPR32>;
+ NoItinerary, MSA128H, GPR32>;
class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w,
- NoItinerary, MSA128, GPR32>;
+ NoItinerary, MSA128W, GPR32>;
class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
ValueType TyNode, InstrItinClass itin, RegisterClass RCWD,
@@ -1495,356 +1495,356 @@ class LD_DESC_BASE<string instr_asm, SDP
InstrItinClass Itinerary = itin;
}
-class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, NoItinerary, MSA128>;
-class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, NoItinerary, MSA128>;
-class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, NoItinerary, MSA128>;
-class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, NoItinerary, MSA128>;
+class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, NoItinerary, MSA128B>;
+class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, NoItinerary, MSA128H>;
+class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, NoItinerary, MSA128W>;
+class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, NoItinerary, MSA128D>;
class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", int_mips_ldi_b,
- NoItinerary, MSA128>;
+ NoItinerary, MSA128B>;
class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", int_mips_ldi_h,
- NoItinerary, MSA128>;
+ NoItinerary, MSA128H>;
class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", int_mips_ldi_w,
- NoItinerary, MSA128>;
+ NoItinerary, MSA128W>;
class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", int_mips_ldi_d,
- NoItinerary, MSA128>;
+ NoItinerary, MSA128D>;
class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", int_mips_mini_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", int_mips_mini_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", int_mips_mini_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", int_mips_mini_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", int_mips_mini_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", int_mips_mini_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", int_mips_mini_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", int_mips_mini_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", int_mips_mulv_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", int_mips_mulv_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", int_mips_mulv_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", int_mips_mulv_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", int_mips_nlzc_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", int_mips_nlzc_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", int_mips_nlzc_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", int_mips_nlzc_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", int_mips_nor_v, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", int_mips_or_v, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", int_mips_pcnt_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", int_mips_pcnt_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", int_mips_pcnt_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", int_mips_pcnt_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", int_mips_sll_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", int_mips_sll_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", int_mips_sll_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", int_mips_sll_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, NoItinerary,
- MSA128, MSA128, GPR32>;
+ MSA128B, MSA128B, GPR32>;
class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, NoItinerary,
- MSA128, MSA128, GPR32>;
+ MSA128H, MSA128H, GPR32>;
class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, NoItinerary,
- MSA128, MSA128, GPR32>;
+ MSA128W, MSA128W, GPR32>;
class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, NoItinerary,
- MSA128, MSA128, GPR32>;
+ MSA128D, MSA128D, GPR32>;
class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", int_mips_sra_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", int_mips_sra_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", int_mips_sra_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", int_mips_sra_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", int_mips_srl_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", int_mips_srl_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", int_mips_srl_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", int_mips_srl_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
ValueType TyNode, InstrItinClass itin, RegisterClass RCWD,
@@ -1857,79 +1857,79 @@ class ST_DESC_BASE<string instr_asm, SDP
}
// Load/Store
-class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, NoItinerary, MSA128>;
-class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, NoItinerary, MSA128>;
-class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, NoItinerary, MSA128>;
-class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, NoItinerary, MSA128>;
+class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, NoItinerary, MSA128B>;
+class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, NoItinerary, MSA128H>;
+class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, NoItinerary, MSA128W>;
+class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, NoItinerary, MSA128D>;
class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", int_mips_subv_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", int_mips_subv_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", int_mips_subv_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", int_mips_subv_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", int_mips_subvi_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", int_mips_subvi_h, NoItinerary,
- MSA128, MSA128>;
+ MSA128H, MSA128H>;
class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", int_mips_subvi_w, NoItinerary,
- MSA128, MSA128>;
+ MSA128W, MSA128W>;
class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", int_mips_subvi_d, NoItinerary,
- MSA128, MSA128>;
+ MSA128D, MSA128D>;
class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128B, MSA128B>;
class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128H, MSA128H>;
class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128W, MSA128W>;
class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d,
- NoItinerary, MSA128, MSA128>;
+ NoItinerary, MSA128D, MSA128D>;
class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", int_mips_xor_v, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, NoItinerary,
- MSA128, MSA128>;
+ MSA128B, MSA128B>;
// Instruction defs.
def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC, Requires<[HasMSA]>;
def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC, Requires<[HasMSA]>;
@@ -2546,9 +2546,9 @@ def LD_FW : MSAPat<(v4f32 (load addr:$ad
def LD_FD : MSAPat<(v2f64 (load addr:$addr)),
(LD_D addr:$addr)>;
-def ST_FH : MSAPat<(store (v8f16 MSA128:$ws), addr:$addr),
- (ST_H MSA128:$ws, addr:$addr)>;
-def ST_FW : MSAPat<(store (v4f32 MSA128:$ws), addr:$addr),
- (ST_W MSA128:$ws, addr:$addr)>;
-def ST_FD : MSAPat<(store (v2f64 MSA128:$ws), addr:$addr),
- (ST_D MSA128:$ws, addr:$addr)>;
+def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
+ (ST_H MSA128H:$ws, addr:$addr)>;
+def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
+ (ST_W MSA128W:$ws, addr:$addr)>;
+def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
+ (ST_D MSA128D:$ws, addr:$addr)>;
Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td?rev=189095&r1=189094&r2=189095&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td Fri Aug 23 05:10:13 2013
@@ -318,9 +318,14 @@ def CCR : RegisterClass<"Mips", [i32], 3
def FCC : RegisterClass<"Mips", [i32], 32, (sequence "FCC%u", 0, 7)>,
Unallocatable;
-def MSA128: RegisterClass<"Mips",
- [v16i8, v8i16, v4i32, v2i64, v8f16, v4f32, v2f64],
- 128, (sequence "W%u", 0, 31)>;
+def MSA128B: RegisterClass<"Mips", [v16i8], 128,
+ (sequence "W%u", 0, 31)>;
+def MSA128H: RegisterClass<"Mips", [v8i16, v8f16], 128,
+ (sequence "W%u", 0, 31)>;
+def MSA128W: RegisterClass<"Mips", [v4i32, v4f32], 128,
+ (sequence "W%u", 0, 31)>;
+def MSA128D: RegisterClass<"Mips", [v2i64, v2f64], 128,
+ (sequence "W%u", 0, 31)>;
// Hi/Lo Registers
def LO32 : RegisterClass<"Mips", [i32], 32, (add LO0)>;
Modified: llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp?rev=189095&r1=189094&r2=189095&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp Fri Aug 23 05:10:13 2013
@@ -78,13 +78,13 @@ MipsSETargetLowering::MipsSETargetLoweri
setOperationAction(ISD::MUL, MVT::v2i16, Legal);
if (Subtarget->hasMSA()) {
- addMSAType(MVT::v16i8);
- addMSAType(MVT::v8i16);
- addMSAType(MVT::v4i32);
- addMSAType(MVT::v2i64);
- addMSAType(MVT::v8f16);
- addMSAType(MVT::v4f32);
- addMSAType(MVT::v2f64);
+ addMSAType(MVT::v16i8, &Mips::MSA128BRegClass);
+ addMSAType(MVT::v8i16, &Mips::MSA128HRegClass);
+ addMSAType(MVT::v4i32, &Mips::MSA128WRegClass);
+ addMSAType(MVT::v2i64, &Mips::MSA128DRegClass);
+ addMSAType(MVT::v8f16, &Mips::MSA128HRegClass);
+ addMSAType(MVT::v4f32, &Mips::MSA128WRegClass);
+ addMSAType(MVT::v2f64, &Mips::MSA128DRegClass);
}
if (!TM.Options.UseSoftFloat) {
@@ -133,9 +133,9 @@ llvm::createMipsSETargetLowering(MipsTar
return new MipsSETargetLowering(TM);
}
-void
-MipsSETargetLowering::addMSAType(MVT::SimpleValueType Ty) {
- addRegisterClass(Ty, &Mips::MSA128RegClass);
+void MipsSETargetLowering::
+addMSAType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC) {
+ addRegisterClass(Ty, RC);
// Expand all builtin opcodes.
for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
Modified: llvm/trunk/lib/Target/Mips/MipsSEISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEISelLowering.h?rev=189095&r1=189094&r2=189095&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEISelLowering.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEISelLowering.h Fri Aug 23 05:10:13 2013
@@ -22,7 +22,7 @@ namespace llvm {
public:
explicit MipsSETargetLowering(MipsTargetMachine &TM);
- void addMSAType(MVT::SimpleValueType Ty);
+ void addMSAType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC);
virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;
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