[llvm] r188868 - Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V.

[Chris Bieneman]

This is definitely the better fix.

Thank you,
-Chris

On Aug 20, 2013, at 10:57 PM, Craig Topper <craig.topper at gmail.com> wrote:

> Author: ctopper
> Date: Wed Aug 21 00:57:45 2013
> New Revision: 188868
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=188868&view=rev
> Log:
> Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V.
> 
> Modified:
>    llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
>    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> 
> Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=188868&r1=188867&r2=188868&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Wed Aug 21 00:57:45 2013
> @@ -786,8 +786,8 @@ void X86MCCodeEmitter::EmitVEXOpcodePref
>       VEX_4V = getVEXRegisterEncoding(MI, CurOp);
>       if (HasEVEX && X86II::is32ExtendedReg(MI.getOperand(CurOp).getReg()))
>         EVEX_V2 = 0x0;
> +      CurOp++;
>     }
> -    CurOp++;
> 
>     if (HasEVEX_K)
>       EVEX_aaa = getWriteMaskRegisterEncoding(MI, CurOp++);
> 
> Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=188868&r1=188867&r2=188868&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Wed Aug 21 00:57:45 2013
> @@ -982,16 +982,13 @@ void Emitter<CodeEmitter>::emitVEXOpcode
>       //  FMA4:
>       //  dst(ModR/M.reg), src1(VEX_4V), src2(ModR/M), src3(VEX_I8IMM)
>       //  dst(ModR/M.reg), src1(VEX_4V), src2(VEX_I8IMM), src3(ModR/M),
> -      if (X86II::isX86_64ExtendedReg(MI.getOperand(0).getReg()))
> +      if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg()))
>         VEX_R = 0x0;
> +      CurOp++;
> 
>       if (HasVEX_4V) {
> -        if (HasMemOp4)
> -          VEX_4V = getVEXRegisterEncoding(MI, 1);
> -        else
> -          // FMA3 instructions operands are dst, src1, src2, src3
> -          // dst and src1 are the same and not encoded separately
> -          VEX_4V = getVEXRegisterEncoding(MI, 2);
> +        VEX_4V = getVEXRegisterEncoding(MI, CurOp);
> +        CurOp++;
>       }
> 
>       if (X86II::isX86_64ExtendedReg(
> @@ -1002,7 +999,7 @@ void Emitter<CodeEmitter>::emitVEXOpcode
>         VEX_X = 0x0;
> 
>       if (HasVEX_4VOp3)
> -        VEX_4V = getVEXRegisterEncoding(MI, X86::AddrNumOperands+1);
> +        VEX_4V = getVEXRegisterEncoding(MI, CurOp+X86::AddrNumOperands);
>       break;
>     case X86II::MRM0m: case X86II::MRM1m:
>     case X86II::MRM2m: case X86II::MRM3m:
> @@ -1012,7 +1009,7 @@ void Emitter<CodeEmitter>::emitVEXOpcode
>       //  MemAddr
>       //  src1(VEX_4V), MemAddr
>       if (HasVEX_4V)
> -        VEX_4V = getVEXRegisterEncoding(MI, 0);
> +        VEX_4V = getVEXRegisterEncoding(MI, CurOp++);
> 
>       if (X86II::isX86_64ExtendedReg(
>                           MI.getOperand(MemOperand+X86::AddrBaseReg).getReg()))
> @@ -1065,8 +1062,10 @@ void Emitter<CodeEmitter>::emitVEXOpcode
>     case X86II::MRM6r: case X86II::MRM7r:
>       // MRM0r-MRM7r instructions forms:
>       //  dst(VEX_4V), src(ModR/M), imm8
> -      VEX_4V = getVEXRegisterEncoding(MI, 0);
> -      if (X86II::isX86_64ExtendedReg(MI.getOperand(1).getReg()))
> +      VEX_4V = getVEXRegisterEncoding(MI, CurOp);
> +      CurOp++;
> +
> +      if (X86II::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg()))
>         VEX_B = 0x0;
>       break;
>     default: // RawFrm
> 
> 
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