[llvm] r188671 - [SystemZ] Add negative integer absolute (load negative)
Richard Sandiford
rsandifo at linux.vnet.ibm.com
Mon Aug 19 05:56:58 PDT 2013
Author: rsandifo
Date: Mon Aug 19 07:56:58 2013
New Revision: 188671
URL: http://llvm.org/viewvc/llvm-project?rev=188671&view=rev
Log:
[SystemZ] Add negative integer absolute (load negative)
For now this matches the equivalent of (neg (abs ...)), which did hit a few
times in projects/test-suite. We should probably also match cases where
absolute-like selects are used with reversed arguments.
Added:
llvm/trunk/test/CodeGen/SystemZ/int-neg-02.ll
Modified:
llvm/trunk/lib/Target/SystemZ/README.txt
llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
llvm/trunk/lib/Target/SystemZ/SystemZOperators.td
llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
llvm/trunk/test/MC/SystemZ/insn-good.s
Modified: llvm/trunk/lib/Target/SystemZ/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/README.txt?rev=188671&r1=188670&r2=188671&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/README.txt (original)
+++ llvm/trunk/lib/Target/SystemZ/README.txt Mon Aug 19 07:56:58 2013
@@ -104,12 +104,6 @@ such as ICM and STCM.
--
-DAGCombiner can detect integer absolute, but there's not yet an associated
-ISD opcode. We could add one and implement it using LOAD POSITIVE.
-Negated absolutes could use LOAD NEGATIVE.
-
---
-
DAGCombiner doesn't yet fold truncations of extended loads. Functions like:
unsigned long f (unsigned long x, unsigned short *y)
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=188671&r1=188670&r2=188671&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Mon Aug 19 07:56:58 2013
@@ -549,6 +549,16 @@ defm : SXU<z_iabs64, LPGFR>;
let Defs = [CC] in {
let CCValues = 0xF, CompareZeroCCMask = 0x8 in {
+ def LNR : UnaryRR <"ln", 0x11, z_inegabs32, GR32, GR32>;
+ def LNGR : UnaryRRE<"lng", 0xB901, z_inegabs64, GR64, GR64>;
+ }
+ let CCValues = 0xE, CompareZeroCCMask = 0xE in
+ def LNGFR : UnaryRRE<"lngf", 0xB911, null_frag, GR64, GR32>;
+}
+defm : SXU<z_inegabs64, LNGFR>;
+
+let Defs = [CC] in {
+ let CCValues = 0xF, CompareZeroCCMask = 0x8 in {
def LCR : UnaryRR <"lc", 0x13, ineg, GR32, GR32>;
def LCGR : UnaryRRE<"lcg", 0xB903, ineg, GR64, GR64>;
}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZOperators.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZOperators.td?rev=188671&r1=188670&r2=188671&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZOperators.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZOperators.td Mon Aug 19 07:56:58 2013
@@ -247,6 +247,8 @@ def z_iabs32 : PatFrag<(ops node:$src),
def z_iabs64 : PatFrag<(ops node:$src),
(xor (add node:$src, (sra node:$src, (i32 63))),
(sra node:$src, (i32 63)))>;
+def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>;
+def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>;
// Fused multiply-add and multiply-subtract, but with the order of the
// operands matching SystemZ's MA and MS instructions.
Added: llvm/trunk/test/CodeGen/SystemZ/int-neg-02.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/int-neg-02.ll?rev=188671&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-neg-02.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/int-neg-02.ll Mon Aug 19 07:56:58 2013
@@ -0,0 +1,91 @@
+; Test negative integer absolute.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+; Test i32->i32 negative absolute using slt.
+define i32 @f1(i32 %val) {
+; CHECK-LABEL: f1:
+; CHECK: lnr %r2, %r2
+; CHECK: br %r14
+ %cmp = icmp slt i32 %val, 0
+ %neg = sub i32 0, %val
+ %abs = select i1 %cmp, i32 %neg, i32 %val
+ %res = sub i32 0, %abs
+ ret i32 %res
+}
+
+; Test i32->i32 negative absolute using sle.
+define i32 @f2(i32 %val) {
+; CHECK-LABEL: f2:
+; CHECK: lnr %r2, %r2
+; CHECK: br %r14
+ %cmp = icmp sle i32 %val, 0
+ %neg = sub i32 0, %val
+ %abs = select i1 %cmp, i32 %neg, i32 %val
+ %res = sub i32 0, %abs
+ ret i32 %res
+}
+
+; Test i32->i32 negative absolute using sgt.
+define i32 @f3(i32 %val) {
+; CHECK-LABEL: f3:
+; CHECK: lnr %r2, %r2
+; CHECK: br %r14
+ %cmp = icmp sgt i32 %val, 0
+ %neg = sub i32 0, %val
+ %abs = select i1 %cmp, i32 %val, i32 %neg
+ %res = sub i32 0, %abs
+ ret i32 %res
+}
+
+; Test i32->i32 negative absolute using sge.
+define i32 @f4(i32 %val) {
+; CHECK-LABEL: f4:
+; CHECK: lnr %r2, %r2
+; CHECK: br %r14
+ %cmp = icmp sge i32 %val, 0
+ %neg = sub i32 0, %val
+ %abs = select i1 %cmp, i32 %val, i32 %neg
+ %res = sub i32 0, %abs
+ ret i32 %res
+}
+
+; Test i32->i64 negative absolute.
+define i64 @f5(i32 %val) {
+; CHECK-LABEL: f5:
+; CHECK: lngfr %r2, %r2
+; CHECK: br %r14
+ %ext = sext i32 %val to i64
+ %cmp = icmp slt i64 %ext, 0
+ %neg = sub i64 0, %ext
+ %abs = select i1 %cmp, i64 %neg, i64 %ext
+ %res = sub i64 0, %abs
+ ret i64 %res
+}
+
+; Test i32->i64 negative absolute that uses an "in-register" form of
+; sign extension.
+define i64 @f6(i64 %val) {
+; CHECK-LABEL: f6:
+; CHECK: lngfr %r2, %r2
+; CHECK: br %r14
+ %trunc = trunc i64 %val to i32
+ %ext = sext i32 %trunc to i64
+ %cmp = icmp slt i64 %ext, 0
+ %neg = sub i64 0, %ext
+ %abs = select i1 %cmp, i64 %neg, i64 %ext
+ %res = sub i64 0, %abs
+ ret i64 %res
+}
+
+; Test i64 negative absolute.
+define i64 @f7(i64 %val) {
+; CHECK-LABEL: f7:
+; CHECK: lngr %r2, %r2
+; CHECK: br %r14
+ %cmp = icmp slt i64 %val, 0
+ %neg = sub i64 0, %val
+ %abs = select i1 %cmp, i64 %neg, i64 %val
+ %res = sub i64 0, %abs
+ ret i64 %res
+}
Modified: llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt?rev=188671&r1=188670&r2=188671&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt (original)
+++ llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt Mon Aug 19 07:56:58 2013
@@ -3307,6 +3307,42 @@
# CHECK: lnebr %f15, %f9
0xb3 0x01 0x00 0xf9
+# CHECK: lngfr %r0, %r0
+0xb9 0x11 0x00 0x00
+
+# CHECK: lngfr %r0, %r15
+0xb9 0x11 0x00 0x0f
+
+# CHECK: lngfr %r15, %r0
+0xb9 0x11 0x00 0xf0
+
+# CHECK: lngfr %r7, %r8
+0xb9 0x11 0x00 0x78
+
+# CHECK: lngr %r0, %r0
+0xb9 0x01 0x00 0x00
+
+# CHECK: lngr %r0, %r15
+0xb9 0x01 0x00 0x0f
+
+# CHECK: lngr %r15, %r0
+0xb9 0x01 0x00 0xf0
+
+# CHECK: lngr %r7, %r8
+0xb9 0x01 0x00 0x78
+
+# CHECK: lnr %r0, %r0
+0x11 0x00
+
+# CHECK: lnr %r0, %r15
+0x11 0x0f
+
+# CHECK: lnr %r15, %r0
+0x11 0xf0
+
+# CHECK: lnr %r7, %r8
+0x11 0x78
+
# CHECK: lnxbr %f0, %f8
0xb3 0x41 0x00 0x08
Modified: llvm/trunk/test/MC/SystemZ/insn-good.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-good.s?rev=188671&r1=188670&r2=188671&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-good.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-good.s Mon Aug 19 07:56:58 2013
@@ -4727,6 +4727,36 @@
lnebr %f15,%f0
lnebr %f15,%f9
+#CHECK: lngfr %r0, %r0 # encoding: [0xb9,0x11,0x00,0x00]
+#CHECK: lngfr %r0, %r15 # encoding: [0xb9,0x11,0x00,0x0f]
+#CHECK: lngfr %r15, %r0 # encoding: [0xb9,0x11,0x00,0xf0]
+#CHECK: lngfr %r7, %r8 # encoding: [0xb9,0x11,0x00,0x78]
+
+ lngfr %r0,%r0
+ lngfr %r0,%r15
+ lngfr %r15,%r0
+ lngfr %r7,%r8
+
+#CHECK: lngr %r0, %r0 # encoding: [0xb9,0x01,0x00,0x00]
+#CHECK: lngr %r0, %r15 # encoding: [0xb9,0x01,0x00,0x0f]
+#CHECK: lngr %r15, %r0 # encoding: [0xb9,0x01,0x00,0xf0]
+#CHECK: lngr %r7, %r8 # encoding: [0xb9,0x01,0x00,0x78]
+
+ lngr %r0,%r0
+ lngr %r0,%r15
+ lngr %r15,%r0
+ lngr %r7,%r8
+
+#CHECK: lnr %r0, %r0 # encoding: [0x11,0x00]
+#CHECK: lnr %r0, %r15 # encoding: [0x11,0x0f]
+#CHECK: lnr %r15, %r0 # encoding: [0x11,0xf0]
+#CHECK: lnr %r7, %r8 # encoding: [0x11,0x78]
+
+ lnr %r0,%r0
+ lnr %r0,%r15
+ lnr %r15,%r0
+ lnr %r7,%r8
+
#CHECK: lnxbr %f0, %f8 # encoding: [0xb3,0x41,0x00,0x08]
#CHECK: lnxbr %f0, %f13 # encoding: [0xb3,0x41,0x00,0x0d]
#CHECK: lnxbr %f13, %f0 # encoding: [0xb3,0x41,0x00,0xd0]
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