[PATCH]Clang and AArch64 backend patches to support sshll/ushll instructions

[Jiangning Liu]

Hi Hao,

In arm_neon.h we have the following generated,

#define vshll_high_n_s8(a, __b) __extension__ ({ \
  int8x16_t __a = (a); \
  (int16x8_t)__builtin_neon_vshll_high_n_v(__a, __b, 33); })

Should this be changed to

#define vshll_high_n_s8(a, __b) __extension__ ({ \
  int64x2_t __a = (a); \
  (int16x8_t)vshll_n_s8(vget_high_s8(__a), __b); })

This would bring some benefits,
1) avoid defining new built-in __builtin_neon_vshll_high_n_v
2) the lowering in CGBuiltin.cpp can be simpler because we needn't to lower
__builtin_neon_vshll_high_n_v any longer
3) this looks more natural to explain the semantics of long2/wide2 type of
aarch64 neon instructions

+  if (isHigh){
+    unsigned NumElts = VTy->getNumElements();
+    unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits();
+    llvm::Type *EltTy =
+      llvm::IntegerType::get(VTy->getContext(), EltBits / 2);
+    // The source operand type has twice as many elements of half the size.
+    llvm::Type *SrcTy = llvm::VectorType::get(EltTy, NumElts * 2);
+    SmallVector<Constant*, 8> Indices;
+    for (unsigned i = 0; i != NumElts; i++)
+      Indices.push_back(Builder.getInt32(i + NumElts));
+    Value *SV = llvm::ConstantVector::get(Indices);
+    Value *Undef = llvm::UndefValue::get(SrcTy);
+    Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy);
+    Ops[0] = Builder.CreateShuffleVector(Ops[0], Undef, SV);

This piece of code would be unnecessary.

Thanks,
-Jiangning


2013/8/15 Tim Northover <t.p.northover at gmail.com>

> Hi Hao,
>
> Thanks for that. The patches look good to me now. Go ahead and commit.
>
> Cheers.
>
> Tim.
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>



-- 
Thanks,
-Jiangning
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