[PATCH] let tablegen compute maximum lanemask for a regs/regclasses

[Jakob Stoklund Olesen]

LGTM

Thanks,
/jakob

On Aug 15, 2013, at 3:28 PM, Matthias Braun <mbraun at apple.com> wrote:

> Attached is a new version that improves the points mentioned below. This version also does not compute lane masks per register anymore, how to translate between register units and lane masks will be something for another commit.
> 
> Greetings
>    Matthias
> <0001-let-tablegen-compute-maximum-lanemask-for-regs-regcl.patch>
> 
> On Aug 14, 2013, at 10:40 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:
> 
>> 
>> On Aug 13, 2013, at 6:38 PM, Matthias Braun <mbraun at apple.com> wrote:
>> 
>>>>> /// TargetRegisterInfoDesc - Extra information, not in MCRegisterDesc, about
>>>>> /// registers. These are used by codegen, not by MC.
>>>>> struct TargetRegisterInfoDesc {
>>>>> unsigned CostPerUse;          // Extra cost of instructions using register.
>>>>> bool inAllocatableClass;      // Register belongs to an allocatable regclass.
>>>>> +  unsigned LaneMask;            // combination of all subregister lane masks
>>>>> };
>>>> 
>>>> This is potentially very expensive - some targets have lots of registers. Do you actually need this?
>>> Well at some points live ranges of physical registers are calculated, so having the maximum lane mask for a specific register will be required. Anyway it is easy to switch to an approach where they are lazily compute on the demand by the passes that need them and not being precomputed by tablegen.
>> 
>> Fixed interference (a.k.a. live ranges of physical registers) is already tracked per-reguint, see LiveIntervals::getRegUnit(). When virtual registers are assigned to physical registers, interference is also tracked per-regunit, see LiveRegMatrix::assign().
>> 
>> This means that we’ll need some way of translating between the regunits in a physical register and the lane masks in a virtual register. Regunits and lane masks are related, but they’re not quite the same thing.
>> 
>>>>> +  // compute lanemask combinations for register classes
>>>>> +  for (size_t c = 0, ce = RegClasses.size(); c != ce; ++c) {
>>>>> +    CodeGenRegisterClass *RegClass = RegClasses[c];
>>>>> +    const CodeGenRegister::Set &Registers = RegClass->getMembers();
>>>>> +    unsigned LaneMask = 0;
>>>>> +    for (CodeGenRegister::Set::iterator R = Registers.begin(),
>>>>> +         RE = Registers.end(); R != RE; ++R) {
>>>>> +      LaneMask |= (*R)->LaneMask;
>>>>> +    }
>>>>> +    RegClass->LaneMask = LaneMask;
>>>>> +  }
>>>> 
>>>> Can you use CodeGenRegisterClass::SubClassWithSubReg instead of computing this via the registers?
>>> I wouldn’t get something computed for all register classes that way, would I?
>> 
>> IIRC, the SubClassWithSubReg map contains an entry for each sub-register index that a register class could possibly support. I think that is what you need to compute a lane mask for a register class.
>> 
>> Thanks,
>> /jakob
>