[llvm] r188454 - Revert r188449 as it turns out we're just missing the instructions that need the v16i32/v16f32 matching.

[Craig Topper]

Author: ctopper
Date: Thu Aug 15 03:38:25 2013
New Revision: 188454

URL: http://llvm.org/viewvc/llvm-project?rev=188454&view=rev
Log:
Revert r188449 as it turns out we're just missing the instructions that need the v16i32/v16f32 matching.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=188454&r1=188453&r2=188454&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 15 03:38:25 2013
@@ -4102,26 +4102,41 @@ static unsigned getShuffleVPERM2X128Imme
   return (FstHalf | (SndHalf << 4));
 }
 
-// Symmetric in-lane mask. Each lane has 4 elements (for imm8)
+// Symetric in-lane mask. Each lane has 4 elements (for imm8)
 static bool isPermImmMask(ArrayRef<int> Mask, MVT VT, unsigned& Imm8) {
-  unsigned NumElts = VT.getVectorNumElements();
-  if (!(VT.is256BitVector() && NumElts == 4) &&
-      !(VT.is512BitVector() && NumElts == 8))
+  unsigned EltSize = VT.getVectorElementType().getSizeInBits();
+  if (EltSize < 32)
     return false;
 
+  unsigned NumElts = VT.getVectorNumElements();
   Imm8 = 0;
+  if (VT.is128BitVector() || (VT.is256BitVector() && EltSize == 64)) {
+    for (unsigned i = 0; i != NumElts; ++i) {
+      if (Mask[i] < 0)
+        continue;
+      Imm8 |= Mask[i] << (i*2);
+    }
+    return true;
+  }
+
   unsigned LaneSize = 4;
+  SmallVector<int, 4> MaskVal(LaneSize, -1);
+
   for (unsigned l = 0; l != NumElts; l += LaneSize) {
     for (unsigned i = 0; i != LaneSize; ++i) {
       if (!isUndefOrInRange(Mask[i+l], l, l+LaneSize))
         return false;
-      if (Mask[i] >= 0 && !isUndefOrEqual(Mask[i+l], Mask[i]+l))
+      if (Mask[i+l] < 0)
+        continue;
+      if (MaskVal[i] < 0) {
+        MaskVal[i] = Mask[i+l] - l;
+        Imm8 |= MaskVal[i] << (i*2);
+        continue;
+      }
+      if (Mask[i+l] != (signed)(MaskVal[i]+l))
         return false;
-      if (Mask[i+l] >= 0)
-        Imm8 |= (Mask[i+l] - l) << (i*2);
     }
   }
-
   return true;
 }
 
@@ -4150,7 +4165,9 @@ static bool isVPERMILPMask(ArrayRef<int>
       if (NumElts != 8 || l == 0)
         continue;
       // VPERMILPS handling
-      if (Mask[i] >= 0 && !isUndefOrEqual(Mask[i+l], Mask[i]+l))
+      if (Mask[i] < 0)
+        continue;
+      if (!isUndefOrEqual(Mask[i+l], Mask[i]+l))
         return false;
     }
   }

Modified: llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll?rev=188454&r1=188453&r2=188454&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll Thu Aug 15 03:38:25 2013
@@ -32,14 +32,6 @@ define <16 x i32> @test2(<16 x i32> %a)
   ret <16 x i32> %c
 }
 
-; CHECK: test2b:
-; CHECK: vpermd
-; CHECK: ret
-define <16 x i32> @test2b(<16 x i32> %a) nounwind {
-  %c = shufflevector <16 x i32> %a, <16 x i32> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
-  ret <16 x i32> %c
-}
-
 ; CHECK: test3:
 ; CHECK: vpermq
 ; CHECK: ret