R600: Various improvements

Tom Stellard tom at stellard.net
Wed Aug 14 15:54:56 PDT 2013 

On Wed, Aug 14, 2013 at 09:49:22AM -0700, Vincent Lejeune wrote:
> Hi,
> 
> the 3 attached patches are not related to each others but they are rather small, that's why I put them together in this mail.
> 
> 
> The first one remove the fmul.v4f32.ll test. The fmul.ll test already test fmul behavior in presence of v4f32 vector so it's redundant.
> The second one add support for a read port optimization in R600 hw : if the first and second source of an instruction are identical (ie same gpr and channel),
> the second source shares the read port of the first one thus relaxing some packing constraints. Some (big) minings shader really appreciate this feature with a reduction
> of up to 10% IG count.
> The last one activates the StructurizeCFG pass for R600. It enables llvm backend to compile some shaders with a complex cfg, like the ones found in shadertoy.
> 
> Vincent

Hi Vincent,

Just a few comments on the last patch.

-Tom

> From 918c17cc0b45d1f315843936e1f2cfdd11420cfb Mon Sep 17 00:00:00 2001
> From: Vincent Lejeune <vljn at ovi.com>
> Date: Wed, 14 Aug 2013 18:03:46 +0200
> Subject: [PATCH] R600: Remove fmul.v4f32.ll test which is redundant with
>  fmul.ll
> 
> ---
>  test/CodeGen/R600/fmul.v4f32.ll | 15 ---------------
>  1 file changed, 15 deletions(-)
>  delete mode 100644 test/CodeGen/R600/fmul.v4f32.ll
> 

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> From 93ed2945376bcaada88b1dab3f562c28a5f199de Mon Sep 17 00:00:00 2001
> From: Vincent Lejeune <vljn at ovi.com>
> Date: Mon, 12 Aug 2013 18:48:58 +0200
> Subject: [PATCH] R600: Use shared op optimization when checking cycle
>  compatibility
> 
> ---
>  lib/Target/R600/R600InstrInfo.cpp    |  2 ++
>  test/CodeGen/R600/shared-op-cycle.ll | 38 ++++++++++++++++++++++++++++++++++++
>  2 files changed, 40 insertions(+)
>  create mode 100644 test/CodeGen/R600/shared-op-cycle.ll

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> From d2c8bd9dfebf27fe076e13fdfd652f0eced07a3a Mon Sep 17 00:00:00 2001
> From: Vincent Lejeune <vljn at ovi.com>
> Date: Fri, 12 Jul 2013 15:26:11 +0200
> Subject: [PATCH] R600: Use StructurizeCFGPass for non SI targets
> 
> StructurizeCFG pass allows to make complex cfg reducible ; it allows a lot of
> shader from shadertoy (which exhibits complex control flow constructs) to works
> correctly with respect to CFG handling (and allow us to detect potential bug in
> other part of the backend).
> 
> We provide a cmd line argument to disable the pass for debug purpose.
> ---
>  lib/Target/R600/AMDGPUTargetMachine.cpp   | 7 ++++++-
>  lib/Target/R600/R600EmitClauseMarkers.cpp | 1 +
>  lib/Target/R600/R600Packetizer.cpp        | 2 +-
>  test/CodeGen/R600/jump-address.ll         | 2 +-
>  test/CodeGen/R600/predicates.ll           | 2 +-
>  5 files changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp
> index 1dc1b6b..13d4dad 100644
> --- a/lib/Target/R600/AMDGPUTargetMachine.cpp
> +++ b/lib/Target/R600/AMDGPUTargetMachine.cpp
> @@ -33,6 +33,10 @@
>  #include "llvm/Transforms/Scalar.h"
>  #include <llvm/CodeGen/Passes.h>
>  
> +static cl::opt<bool>
> +DisableStructurizer("disable-structurizer", cl::init(false),
> +                     cl::Hidden, cl::desc("Disable Structurizer"));
> +

I would prefer this be implemented as a subtarget feature, so it could
also be turned on and off from Mesa.  Also, I think the name may be a
little misleading, because even with -disable-structurizer, the
MachineInstr structurizer is still being run, right?  Maybe call it
-disable-ir-structurizer

>  using namespace llvm;
>  
>  extern "C" void LLVMInitializeR600Target() {
> @@ -108,8 +112,9 @@ TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) {
>  bool
>  AMDGPUPassConfig::addPreISel() {
>    const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
> -  if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
> +  if (!DisableStructurizer)
>      addPass(createStructurizeCFGPass());
> +  if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
>      addPass(createSIAnnotateControlFlowPass());
>    } else {
>      addPass(createR600TextureIntrinsicsReplacer());
> diff --git a/lib/Target/R600/R600EmitClauseMarkers.cpp b/lib/Target/R600/R600EmitClauseMarkers.cpp
> index fac2b47..a055639 100644
> --- a/lib/Target/R600/R600EmitClauseMarkers.cpp
> +++ b/lib/Target/R600/R600EmitClauseMarkers.cpp
> @@ -84,6 +84,7 @@ private:
>      switch (MI->getOpcode()) {
>      case AMDGPU::KILL:
>      case AMDGPU::RETURN:
> +    case AMDGPU::IMPLICIT_DEF:

This change seems unrelated.

>        return true;
>      default:
>        return false;
> diff --git a/lib/Target/R600/R600Packetizer.cpp b/lib/Target/R600/R600Packetizer.cpp
> index f4219bd..cac9738 100644
> --- a/lib/Target/R600/R600Packetizer.cpp
> +++ b/lib/Target/R600/R600Packetizer.cpp
> @@ -304,7 +304,7 @@ bool R600Packetizer::runOnMachineFunction(MachineFunction &Fn) {
>      MachineBasicBlock::iterator End = MBB->end();
>      MachineBasicBlock::iterator MI = MBB->begin();
>      while (MI != End) {
> -      if (MI->isKill() ||
> +      if (MI->isKill() || MI->getOpcode() == AMDGPU::IMPLICIT_DEF ||

This one does too.

>            (MI->getOpcode() == AMDGPU::CF_ALU && !MI->getOperand(8).getImm())) {
>          MachineBasicBlock::iterator DeleteMI = MI;
>          ++MI;
> diff --git a/test/CodeGen/R600/jump-address.ll b/test/CodeGen/R600/jump-address.ll
> index 26c298b..e88b2e3 100644
> --- a/test/CodeGen/R600/jump-address.ll
> +++ b/test/CodeGen/R600/jump-address.ll
> @@ -1,4 +1,4 @@
> -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
> +;RUN: llc < %s -march=r600 -mcpu=redwood -disable-structurizer | FileCheck %s
>  
>  ; CHECK: JUMP @5
>  ; CHECK: EXPORT
> diff --git a/test/CodeGen/R600/predicates.ll b/test/CodeGen/R600/predicates.ll
> index 0d3eeef..1298448 100644
> --- a/test/CodeGen/R600/predicates.ll
> +++ b/test/CodeGen/R600/predicates.ll
> @@ -1,4 +1,4 @@
> -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
> +; RUN: llc < %s -march=r600 -mcpu=redwood -disable-structurizer | FileCheck %s
>  
>  ; These tests make sure the compiler is optimizing branches using predicates
>  ; when it is legal to do so.
> -- 
> 1.8.3.1
> 

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