[PATCH]Clang and AArch64 backend patches to support sshll/ushll instructions

[Tim Northover]

Hi Hao,

> Do you mean I can use the combination of ISD::SHL and NEON_DUPimm?

Yep, that's what I mean. Well, not necessarily even applying only to immediates.

> But ISD::SHL require two vectors and no immediate value.

So you make NEON_DUP take  an immediate operand and produce a vector
result from it. It would even match an actual "dup v0.4s, w0"
instruction, when we get around to adding it.

A very simple example DAG to match might be:

    (v4i32 (shl (v4i32 VPR128:$Rn), (v4i32 (NEON_DUP i32shiftimm:$imm))))

produced by code like:

    DAG.getNode(ISD::SHL, DL, MVT::v4i32, LHS,
        DAG.getNode(AArch64ISD::NEON_DUP, DL, MVT::v4i32,
            DAG.getConstant(MVT::i32, ShiftAmount)));

It would even match a real instruction like "dup v0.4s, w0" when we
get around to adding it. If you had a DAG like

    (v4i32 (NEON_DUP i32:$AnyValueAtAll))

Then it could be mapped to:

    (DUPvw_4S i32:$AnyValueAtAll)

which after register-allocation etc might become

    mov w0, AnyValueAtAll
    dup v0.4s, w0

Let me know if you still don't understand. I'm quite happy to try
explaining some more.

Cheers.

Tim.