[llvm] r188315 - DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)

[Nadav Rotem]

Why is this done in DAGCombine and not InstCombine ?

On Aug 13, 2013, at 2:30 PM, Jim Grosbach <grosbach at apple.com> wrote:

> Author: grosbach
> Date: Tue Aug 13 16:30:58 2013
> New Revision: 188315
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=188315&view=rev
> Log:
> DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
> 
> A common idiom is to use zero and all-ones as sentinal values and to
> check for both in a single conditional ("x != 0 && x != (unsigned)-1").
> That generates code, for i32, like:
>  testl %edi, %edi
>  setne %al
>  cmpl  $-1, %edi
>  setne %cl
>  andb  %al, %cl
> 
> With this transform, we generate the simpler:
>  incl  %edi
>  cmpl  $1, %edi
>  seta  %al
> 
> Similar improvements for other integer sizes and on other platforms. In
> general, combining the two setcc instructions into one is better.
> 
> rdar://14689217
> 
> Added:
>    llvm/trunk/test/CodeGen/ARM/setcc-sentinals.ll
>    llvm/trunk/test/CodeGen/X86/setcc-sentinals.ll
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=188315&r1=188314&r2=188315&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Aug 13 16:30:58 2013
> @@ -2675,6 +2675,19 @@ SDValue DAGCombiner::visitAND(SDNode *N)
>         return DAG.getSetCC(SDLoc(N), VT, ORNode, LR, Op1);
>       }
>     }
> +    // Simplify (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
> +    if (LL == RL && isa<ConstantSDNode>(LR) && isa<ConstantSDNode>(RR) &&
> +        Op0 == Op1 && LL.getValueType().isInteger() &&
> +      Op0 == ISD::SETNE && ((cast<ConstantSDNode>(LR)->isNullValue() &&
> +                                 cast<ConstantSDNode>(RR)->isAllOnesValue()) ||
> +                                (cast<ConstantSDNode>(LR)->isAllOnesValue() &&
> +                                 cast<ConstantSDNode>(RR)->isNullValue()))) {
> +      SDValue ADDNode = DAG.getNode(ISD::ADD, SDLoc(N0), LL.getValueType(),
> +                                    LL, DAG.getConstant(1, LL.getValueType()));
> +      AddToWorkList(ADDNode.getNode());
> +      return DAG.getSetCC(SDLoc(N), VT, ADDNode,
> +                          DAG.getConstant(2, LL.getValueType()), ISD::SETUGE);
> +    }
>     // canonicalize equivalent to ll == rl
>     if (LL == RR && LR == RL) {
>       Op1 = ISD::getSetCCSwappedOperands(Op1);
> 
> Added: llvm/trunk/test/CodeGen/ARM/setcc-sentinals.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/setcc-sentinals.ll?rev=188315&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/setcc-sentinals.ll (added)
> +++ llvm/trunk/test/CodeGen/ARM/setcc-sentinals.ll Tue Aug 13 16:30:58 2013
> @@ -0,0 +1,14 @@
> +; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false | FileCheck %s
> +
> +define zeroext i1 @test0(i32 %x) nounwind {
> +; CHECK-LABEL: test0:
> +; CHECK-NEXT: add [[REG:(r[0-9]+)|(lr)]], r0, #1
> +; CHECK-NEXT: mov r0, #0
> +; CHECK-NEXT: cmp [[REG]], #1
> +; CHECK-NEXT: movhi r0, #1
> +; CHECK-NEXT: bx  lr
> +  %cmp1 = icmp ne i32 %x, -1
> +  %not.cmp = icmp ne i32 %x, 0
> +  %.cmp1 = and i1 %cmp1, %not.cmp
> +  ret i1 %.cmp1
> +}
> 
> Added: llvm/trunk/test/CodeGen/X86/setcc-sentinals.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/setcc-sentinals.ll?rev=188315&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/setcc-sentinals.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/setcc-sentinals.ll Tue Aug 13 16:30:58 2013
> @@ -0,0 +1,13 @@
> +; RUN: llc < %s -mcpu=generic -march=x86-64 -asm-verbose=false | FileCheck %s
> +
> +define zeroext i1 @test0(i64 %x) nounwind {
> +; CHECK-LABEL: test0:
> +; CHECK-NEXT: incq %rdi
> +; CHECK-NEXT: cmpq $1, %rdi
> +; CHECK-NEXT: seta %al
> +; CHECK-NEXT: ret
> +  %cmp1 = icmp ne i64 %x, -1
> +  %not.cmp = icmp ne i64 %x, 0
> +  %.cmp1 = and i1 %cmp1, %not.cmp
> +  ret i1 %.cmp1
> +}
> 
> 
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